nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-23 18:16:01 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: fb: fix CERT-C violations

Browse Source 
CERT-C Rule INT30-C Requires that unsigned integer operations do not
wrap. Fix these violations by using the safe ops.

JIRA NVGPU-3868

Change-Id: I51e8ee212777232b6d7c033078bea9b9c77ff898
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2166259
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Philip Elcan
2019-08-01 10:54:10 -04:00
committed by mobile promotions
parent a09142c231
commit 42f5a2d806
2 changed files with 25 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/hal/fb/fb_gm20b_fusa.c
View File

@@ -308,5 +308,5 @@ void gm20b_fb_read_wpr_info(struct gk20a *g, u64 *wpr_base, u64 *wpr_size)
(val << WPR_INFO_ADDR_ALIGNMENT)); (val << WPR_INFO_ADDR_ALIGNMENT));
*wpr_base = wpr_start; *wpr_base = wpr_start;
*wpr_size = (wpr_end - wpr_start); *wpr_size = nvgpu_safe_sub_u64(wpr_end, wpr_start);
} }

36
drivers/gpu/nvgpu/hal/fb/intr/fb_intr_ecc_gv11b_fusa.c
View File

@@ -146,10 +146,14 @@ static void gv11b_fb_intr_handle_ecc_l2tlb(struct gk20a *g, u32 ecc_status)
BIT32(fb_mmu_l2tlb_ecc_uncorrected_err_count_total_s()); BIT32(fb_mmu_l2tlb_ecc_uncorrected_err_count_total_s());
} }
g->ecc.fb.mmu_l2tlb_ecc_corrected_err_count[0].counter += g->ecc.fb.mmu_l2tlb_ecc_corrected_err_count[0].counter =
corrected_delta; nvgpu_safe_add_u32(
g->ecc.fb.mmu_l2tlb_ecc_uncorrected_err_count[0].counter += g->ecc.fb.mmu_l2tlb_ecc_corrected_err_count[0].counter,
uncorrected_delta; corrected_delta);
g->ecc.fb.mmu_l2tlb_ecc_uncorrected_err_count[0].counter =
nvgpu_safe_add_u32(
g->ecc.fb.mmu_l2tlb_ecc_uncorrected_err_count[0].counter,
uncorrected_delta);
if ((ecc_status & if ((ecc_status &
fb_mmu_l2tlb_ecc_status_corrected_err_l2tlb_sa_data_m()) fb_mmu_l2tlb_ecc_status_corrected_err_l2tlb_sa_data_m())
@@ -224,10 +228,14 @@ static void gv11b_fb_intr_handle_ecc_hubtlb(struct gk20a *g, u32 ecc_status)
BIT32(fb_mmu_hubtlb_ecc_uncorrected_err_count_total_s()); BIT32(fb_mmu_hubtlb_ecc_uncorrected_err_count_total_s());
} }
g->ecc.fb.mmu_hubtlb_ecc_corrected_err_count[0].counter += g->ecc.fb.mmu_hubtlb_ecc_corrected_err_count[0].counter =
corrected_delta; nvgpu_safe_add_u32(
g->ecc.fb.mmu_hubtlb_ecc_uncorrected_err_count[0].counter += g->ecc.fb.mmu_hubtlb_ecc_corrected_err_count[0].counter,
uncorrected_delta; corrected_delta);
g->ecc.fb.mmu_hubtlb_ecc_uncorrected_err_count[0].counter =
nvgpu_safe_add_u32(
g->ecc.fb.mmu_hubtlb_ecc_uncorrected_err_count[0].counter,
uncorrected_delta);
if ((ecc_status & if ((ecc_status &
fb_mmu_hubtlb_ecc_status_corrected_err_sa_data_m()) != 0U) { fb_mmu_hubtlb_ecc_status_corrected_err_sa_data_m()) != 0U) {
@@ -301,10 +309,14 @@ static void gv11b_fb_intr_handle_ecc_fillunit(struct gk20a *g, u32 ecc_status)
BIT32(fb_mmu_fillunit_ecc_uncorrected_err_count_total_s()); BIT32(fb_mmu_fillunit_ecc_uncorrected_err_count_total_s());
} }
g->ecc.fb.mmu_fillunit_ecc_corrected_err_count[0].counter += g->ecc.fb.mmu_fillunit_ecc_corrected_err_count[0].counter =
corrected_delta; nvgpu_safe_add_u32(
g->ecc.fb.mmu_fillunit_ecc_uncorrected_err_count[0].counter += g->ecc.fb.mmu_fillunit_ecc_corrected_err_count[0].counter,
uncorrected_delta; corrected_delta);
g->ecc.fb.mmu_fillunit_ecc_uncorrected_err_count[0].counter =
nvgpu_safe_add_u32(
g->ecc.fb.mmu_fillunit_ecc_uncorrected_err_count[0].counter,
uncorrected_delta);
if ((ecc_status & if ((ecc_status &
fb_mmu_fillunit_ecc_status_corrected_err_pte_data_m()) != 0U) { fb_mmu_fillunit_ecc_status_corrected_err_pte_data_m()) != 0U) {