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gpu: nvgpu: runlist MISRA fix for rule 2.2

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Removed initialization of ret in tu104_runlist_wait_pending,
as it is immediately overwritten with ret value from
nvgpu_timeout_init.

Jira NVGPU-3378

Change-Id: Icb565c173ba1ab7ad13ef7393888ab7832257d26
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109478
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-04-30 10:59:28 -07:00
committed by mobile promotions
parent 7ff3d7d11c
commit 5d85d2607d
1 changed files with 1 additions and 1 deletions
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2
drivers/gpu/nvgpu/hal/fifo/runlist_fifo_tu104.c
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@@ -67,7 +67,7 @@ int tu104_runlist_wait_pending(struct gk20a *g, u32 runlist_id)
{
struct nvgpu_timeout timeout;
u32 delay = POLL_DELAY_MIN_US;
int ret = -ETIMEDOUT;
int ret;
ret = nvgpu_timeout_init(g, &timeout, nvgpu_get_poll_timeout(g),
NVGPU_TIMER_CPU_TIMER);