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gpu: nvgpu: runlist MISRA fix for rule 13.5

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MISRA Rule 13.5 mandates that the right hand operand of a
logical && or || operator does not contain persistent side effects.

Removed use of nvgpu_readl from the if condition.

Jira NVGPU-3378

Change-Id: Ia5d7c083d6827f8a7db152757e683a4a06418b21
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2109477
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-04-30 10:48:11 -07:00
committed by mobile promotions
parent 57be9a09fd
commit 7ff3d7d11c
1 changed files with 6 additions and 3 deletions
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9
drivers/gpu/nvgpu/hal/fifo/runlist_fifo_gk20a.c
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@@ -157,9 +157,12 @@ int gk20a_fifo_reschedule_preempt_next(struct channel_gk20a *ch,
return ret;
}
if (wait_preempt && ((nvgpu_readl(g, fifo_preempt_r()) &
fifo_preempt_pending_true_f()) != 0U)) {
return ret;
if (wait_preempt) {
u32 val = nvgpu_readl(g, fifo_preempt_r());
if ((val & fifo_preempt_pending_true_f()) != 0U) {
return ret;
}
}
fecsstat0 = g->ops.gr.falcon.read_fecs_ctxsw_mailbox(g,