nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 09:12:24 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: vgpu: add rleng_id to constants

Browse Source 
rl_eng_id is used to construct ram_fc_target_w. VF creates inst_block
and ramfc on client side.

Jira GVSCI-15769

Change-Id: Id641e644e829bfaf6a3bb0bb758c142f0a514db3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2863431
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2023-01-25 10:01:53 -08:00
committed by mobile promotions
parent 9dd2a8fc73
commit 64e22ee54b
2 changed files with 4 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/common/vgpu/top/top_vgpu.c
View File

@@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -59,6 +59,7 @@ struct nvgpu_device *vgpu_top_parse_next_dev(struct gk20a *g, u32 *token)
dev->intr_id = nvgpu_ffs(engines->info[*token].intr_mask) - 1; dev->intr_id = nvgpu_ffs(engines->info[*token].intr_mask) - 1;
dev->reset_id = nvgpu_ffs(engines->info[*token].reset_mask) - 1; dev->reset_id = nvgpu_ffs(engines->info[*token].reset_mask) - 1;
dev->runlist_id = engines->info[*token].runlist_id; dev->runlist_id = engines->info[*token].runlist_id;
dev->rleng_id = engines->info[*token].rleng_id;
dev->pbdma_id = engines->info[*token].pbdma_id; dev->pbdma_id = engines->info[*token].pbdma_id;
dev->inst_id = engines->info[*token].inst_id; dev->inst_id = engines->info[*token].inst_id;
dev->pri_base = engines->info[*token].pri_base; dev->pri_base = engines->info[*token].pri_base;

3
drivers/gpu/nvgpu/include/nvgpu/vgpu/tegra_vgpu.h
View File

@@ -1,7 +1,7 @@
/* /*
* Tegra GPU Virtualization Interfaces to Server * Tegra GPU Virtualization Interfaces to Server
* *
* Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2014-2023, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -448,6 +448,7 @@ struct tegra_vgpu_engines_info {
u32 intr_mask; u32 intr_mask;
u32 reset_mask; u32 reset_mask;
u32 runlist_id; u32 runlist_id;
u32 rleng_id;
u32 pbdma_id; u32 pbdma_id;
u32 inst_id; u32 inst_id;
u32 pri_base; u32 pri_base;