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gpu: nvgpu: rd coalesce WAR applies pre-Volta

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WAR to disable to rd coalescing for lg, su and tex units is applicable
only before Volta (i.e. Maxwell and Pascal). Hence set the hal to
NULL for gv100 and gv11b.

Bug 3881919

Change-Id: Iab5dd8caf6539f0bb3cc4987f2b5f114db4c2c20
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2864093
Reviewed-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Sagar Kamble
2023-02-27 16:13:20 +05:30
committed by mobile promotions
parent b2c8827c65
commit 6dfacee682
2 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/gv100/hal_gv100.c
View File

@@ -1,7 +1,7 @@
/*
* GV100 Tegra HAL interface
*
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -441,7 +441,7 @@ static const struct gpu_ops gv100_ops = {
.clear_sm_hww = gv11b_gr_clear_sm_hww,
.init_ovr_sm_dsm_perf = gv11b_gr_init_ovr_sm_dsm_perf,
.get_ovr_perf_regs = gv11b_gr_get_ovr_perf_regs,
.disable_rd_coalesce = gm20a_gr_disable_rd_coalesce,
.disable_rd_coalesce = NULL,
.set_boosted_ctx = gr_gp10b_set_boosted_ctx,
.set_preemption_mode = gr_gp10b_set_preemption_mode,
.set_czf_bypass = NULL,

4
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -1,7 +1,7 @@
/*
* GV11B Tegra HAL interface
*
* Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -393,7 +393,7 @@ static const struct gpu_ops gv11b_ops = {
.clear_sm_hww = gv11b_gr_clear_sm_hww,
.init_ovr_sm_dsm_perf = gv11b_gr_init_ovr_sm_dsm_perf,
.get_ovr_perf_regs = gv11b_gr_get_ovr_perf_regs,
.disable_rd_coalesce = gm20a_gr_disable_rd_coalesce,
.disable_rd_coalesce = NULL,
.set_boosted_ctx = gr_gp10b_set_boosted_ctx,
.set_preemption_mode = gr_gp10b_set_preemption_mode,
.set_czf_bypass = NULL,