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gpu: nvgpu: engines MISRA fixes for Rule 10.3

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Use BIT32 for shift operation on u32 act_eng_id.

Jira NVGPU-3385

Change-Id: I92f55bceafb87ba385786360f8df95f128b92351
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113034
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-05-06 09:17:08 -07:00
committed by mobile promotions
parent 778f6b2874
commit 6fe4c09c68
1 changed files with 1 additions and 1 deletions
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drivers/gpu/nvgpu/common/fifo/engines.c
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@@ -894,7 +894,7 @@ u32 nvgpu_engine_get_runlist_busy_engines(struct gk20a *g, u32 runlist_id)
engine_busy = engine_status.is_busy;
if (engine_busy && engine_runlist == runlist_id) {
eng_bitmask |= BIT(act_eng_id);
eng_bitmask |= BIT32(act_eng_id);
}
}