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gpu: nvgpu: update gops.cg

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Update gops.cg to include following runlist level cg ops:
- blcg_runlist_load_gating_prod
- slcg_runlist_load_gating_prod

Jira NVGPU-5048

Change-Id: Ia2a3f887d5c2fd6f1dd35d606afd19d117468c2c
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2300448
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Vedashree Vidwans
2020-02-20 16:56:17 -08:00
committed by Alex Waterman
parent 490e1ee06c
commit 7aa9e90bfc
2 changed files with 25 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
drivers/gpu/nvgpu/common/power_features/cg/cg.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -113,6 +113,11 @@ void nvgpu_cg_blcg_fifo_load_enable(struct gk20a *g)
if (g->ops.cg.blcg_fifo_load_gating_prod != NULL) {
g->ops.cg.blcg_fifo_load_gating_prod(g, true);
}
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
if (g->ops.cg.blcg_runlist_load_gating_prod != NULL) {
g->ops.cg.blcg_runlist_load_gating_prod(g, true);
}
#endif
done:
nvgpu_mutex_release(&g->cg_pg_lock);
}
@@ -206,6 +211,11 @@ void nvgpu_cg_slcg_fifo_load_enable(struct gk20a *g)
if (g->ops.cg.slcg_fifo_load_gating_prod != NULL) {
g->ops.cg.slcg_fifo_load_gating_prod(g, true);
}
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
if (g->ops.cg.slcg_runlist_load_gating_prod != NULL) {
g->ops.cg.slcg_runlist_load_gating_prod(g, true);
}
#endif
done:
nvgpu_mutex_release(&g->cg_pg_lock);
}
@@ -479,6 +489,11 @@ void nvgpu_cg_blcg_set_blcg_enabled(struct gk20a *g, bool enable)
if (g->ops.cg.blcg_gr_load_gating_prod != NULL) {
g->ops.cg.blcg_gr_load_gating_prod(g, enable);
}
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
if (g->ops.cg.blcg_runlist_load_gating_prod != NULL) {
g->ops.cg.blcg_runlist_load_gating_prod(g, enable);
}
#endif
if (g->ops.cg.blcg_ltc_load_gating_prod != NULL) {
g->ops.cg.blcg_ltc_load_gating_prod(g, enable);
}
@@ -535,6 +550,11 @@ void nvgpu_cg_slcg_set_slcg_enabled(struct gk20a *g, bool enable)
if (g->ops.cg.slcg_fifo_load_gating_prod != NULL) {
g->ops.cg.slcg_fifo_load_gating_prod(g, enable);
}
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
if (g->ops.cg.slcg_runlist_load_gating_prod != NULL) {
g->ops.cg.slcg_runlist_load_gating_prod(g, enable);
}
#endif
if (g->ops.cg.slcg_gr_load_gating_prod != NULL) {
g->ops.cg.slcg_gr_load_gating_prod(g, enable);
}

5
drivers/gpu/nvgpu/include/nvgpu/gops_cg.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -60,6 +60,9 @@ struct gops_cg {
void (*blcg_pmu_load_gating_prod)(struct gk20a *g, bool prod);
void (*blcg_xbar_load_gating_prod)(struct gk20a *g, bool prod);
void (*blcg_hshub_load_gating_prod)(struct gk20a *g, bool prod);
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "include/nvgpu/nvgpu_next_gops_cg.h"
#endif
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
};