gpu: nvgpu: gv11b: init alloc_blob_space fn ptr

Use NVGPU_DMA_FORCE_CONTIGUOUS for non-wpr blob alloc.
CPU writes some data to non WPR blob (sysmem). ACR binary executing
from PMU, first copies that data to DMEM and then copies that data into WPR.
Without NVGPU_DMA_FORCE_CONTIGUOUS, secure boot fails due to ACR writing
wrong bootloader data to PMU DMEM.

Bug 200355756

Change-Id: I18982caff62b2e7cbe64ea98c1bb935496cfe91c
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1610491
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Seema Khowala
2017-12-01 12:15:36 -08:00
committed by Alexander Van Brunt
parent 5791b47d81
commit 7d65ec92d8
3 changed files with 15 additions and 1 deletions

View File

@@ -54,6 +54,18 @@ static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
/*Forwards*/
int gv11b_alloc_blob_space(struct gk20a *g,
size_t size, struct nvgpu_mem *mem)
{
int err;
gv11b_dbg_pmu("alloc blob space: NVGPU_DMA_FORCE_CONTIGUOUS");
err = nvgpu_dma_alloc_flags_sys(g, NVGPU_DMA_FORCE_CONTIGUOUS,
size, mem);
return err;
}
/*Loads ACR bin to FB mem and bootstraps PMU with bootloader code
* start and end are addresses of ucode blob in non-WPR region*/
int gv11b_bootstrap_hs_flcn(struct gk20a *g)

View File

@@ -28,4 +28,6 @@ int gv11b_bootstrap_hs_flcn(struct gk20a *g);
int gv11b_init_pmu_setup_hw1(struct gk20a *g,
void *desc, u32 bl_sz);
void gv11b_setup_apertures(struct gk20a *g);
int gv11b_alloc_blob_space(struct gk20a *g, size_t size,
struct nvgpu_mem *mem);
#endif /*__PMU_GP106_H_*/

View File

@@ -743,7 +743,7 @@ int gv11b_init_hal(struct gk20a *g)
gops->pmu.prepare_ucode = gp106_prepare_ucode_blob,
gops->pmu.pmu_setup_hw_and_bootstrap = gv11b_bootstrap_hs_flcn,
gops->pmu.get_wpr = gm20b_wpr_info,
gops->pmu.alloc_blob_space = gm20b_alloc_blob_space,
gops->pmu.alloc_blob_space = gv11b_alloc_blob_space,
gops->pmu.pmu_populate_loader_cfg =
gp106_pmu_populate_loader_cfg,
gops->pmu.flcn_populate_bl_dmem_desc =