gpu: nvgpu: Reorg cde HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the cde
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I9343ce4985eb941a2610f5f11e8f01269ab68481
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master/r/1511673
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Sunny He
2017-06-30 10:31:31 -07:00
committed by mobile promotions
parent 997ea5cef3
commit 858a204362
7 changed files with 39 additions and 27 deletions

View File

@@ -1,7 +1,7 @@
/*
* GM20B CDE
*
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -26,7 +26,7 @@ enum programs {
PROG_PASSTHROUGH = 6,
};
static void gm20b_cde_get_program_numbers(struct gk20a *g,
void gm20b_cde_get_program_numbers(struct gk20a *g,
u32 block_height_log2,
int *hprog_out, int *vprog_out)
{
@@ -46,8 +46,3 @@ static void gm20b_cde_get_program_numbers(struct gk20a *g,
*hprog_out = hprog;
*vprog_out = vprog;
}
void gm20b_init_cde_ops(struct gpu_ops *gops)
{
gops->cde.get_program_numbers = gm20b_cde_get_program_numbers;
}

View File

@@ -1,7 +1,7 @@
/*
* GM20B CDE
*
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,8 +16,10 @@
#ifndef _NVHOST_GM20B_CDE
#define _NVHOST_GM20B_CDE
struct gpu_ops;
struct gk20a;
void gm20b_init_cde_ops(struct gpu_ops *gops);
void gm20b_cde_get_program_numbers(struct gk20a *g,
u32 block_height_log2,
int *hprog_out, int *vprog_out);
#endif

View File

@@ -199,6 +199,9 @@ static const struct gpu_ops gm20b_ops = {
.pg_gr_load_gating_prod =
gr_gm20b_pg_gr_load_gating_prod,
},
.cde = {
.get_program_numbers = gm20b_cde_get_program_numbers
},
.chip_init_gpu_characteristics = gk20a_init_gpu_characteristics,
.get_litter_value = gm20b_get_litter_value,
};
@@ -211,6 +214,7 @@ int gm20b_init_hal(struct gk20a *g)
gops->ltc = gm20b_ops.ltc;
gops->clock_gating = gm20b_ops.clock_gating;
gops->cde = gm20b_ops.cde;
/* Lone functions */
gops->chip_init_gpu_characteristics =
@@ -261,7 +265,6 @@ int gm20b_init_hal(struct gk20a *g)
gm20b_init_regops(gops);
gk20a_init_debug_ops(gops);
gk20a_init_dbg_session_ops(gops);
gm20b_init_cde_ops(gops);
gm20b_init_therm_ops(gops);
gk20a_init_tsg_ops(gops);
#if defined(CONFIG_GK20A_CYCLE_STATS)

View File

@@ -239,6 +239,11 @@ static const struct gpu_ops gp106_ops = {
.pg_gr_load_gating_prod =
gr_gp106_pg_gr_load_gating_prod,
},
.cde = {
.get_program_numbers = gp10b_cde_get_program_numbers,
.need_scatter_buffer = gp10b_need_scatter_buffer,
.populate_scatter_buffer = gp10b_populate_scatter_buffer,
},
.xve = {
.sw_init = xve_sw_init_gp106,
.get_speed = xve_get_speed_gp106,
@@ -268,6 +273,7 @@ int gp106_init_hal(struct gk20a *g)
gops->ltc = gp106_ops.ltc;
gops->clock_gating = gp106_ops.clock_gating;
gops->cde = gp106_ops.cde;
gops->xve = gp106_ops.xve;
/* Lone functions */
@@ -296,7 +302,6 @@ int gp106_init_hal(struct gk20a *g)
gp106_init_clk_ops(gops);
gp106_init_clk_arb_ops(gops);
gp106_init_regops(gops);
gp10b_init_cde_ops(gops);
gk20a_init_tsg_ops(gops);
gk20a_init_pramin_ops(gops);
#if defined(CONFIG_GK20A_CYCLE_STATS)

View File

@@ -1,7 +1,7 @@
/*
* GP10B CDE
*
* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -30,7 +30,7 @@ enum gp10b_programs {
GP10B_PROG_PASSTHROUGH = 8,
};
static void gp10b_cde_get_program_numbers(struct gk20a *g,
void gp10b_cde_get_program_numbers(struct gk20a *g,
u32 block_height_log2,
int *hprog_out, int *vprog_out)
{
@@ -60,7 +60,7 @@ static void gp10b_cde_get_program_numbers(struct gk20a *g,
*vprog_out = vprog;
}
static bool gp10b_need_scatter_buffer(struct gk20a *g)
bool gp10b_need_scatter_buffer(struct gk20a *g)
{
return g->mm.bypass_smmu;
}
@@ -74,7 +74,7 @@ static u8 parity(u32 a)
return (0x6996u >> a) & 1u;
}
static int gp10b_populate_scatter_buffer(struct gk20a *g,
int gp10b_populate_scatter_buffer(struct gk20a *g,
struct sg_table *sgt,
size_t surface_size,
void *scatter_buffer_ptr,
@@ -140,10 +140,3 @@ static int gp10b_populate_scatter_buffer(struct gk20a *g,
return 0;
}
void gp10b_init_cde_ops(struct gpu_ops *gops)
{
gops->cde.get_program_numbers = gp10b_cde_get_program_numbers;
gops->cde.need_scatter_buffer = gp10b_need_scatter_buffer;
gops->cde.populate_scatter_buffer = gp10b_populate_scatter_buffer;
}

View File

@@ -1,7 +1,7 @@
/*
* GP10B CDE
*
* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -16,8 +16,17 @@
#ifndef _NVHOST_GP10B_CDE
#define _NVHOST_GP10B_CDE
struct gpu_ops;
struct gk20a;
struct sg_table;
void gp10b_init_cde_ops(struct gpu_ops *gops);
void gp10b_cde_get_program_numbers(struct gk20a *g,
u32 block_height_log2,
int *hprog_out, int *vprog_out);
bool gp10b_need_scatter_buffer(struct gk20a *g);
int gp10b_populate_scatter_buffer(struct gk20a *g,
struct sg_table *sgt,
size_t surface_size,
void *scatter_buffer_ptr,
size_t scatter_buffer_size);
#endif

View File

@@ -207,6 +207,11 @@ static const struct gpu_ops gp10b_ops = {
.pg_gr_load_gating_prod =
gr_gp10b_pg_gr_load_gating_prod,
},
.cde = {
.get_program_numbers = gp10b_cde_get_program_numbers,
.need_scatter_buffer = gp10b_need_scatter_buffer,
.populate_scatter_buffer = gp10b_populate_scatter_buffer,
},
.chip_init_gpu_characteristics = gp10b_init_gpu_characteristics,
.get_litter_value = gp10b_get_litter_value,
};
@@ -219,6 +224,7 @@ int gp10b_init_hal(struct gk20a *g)
gops->ltc = gp10b_ops.ltc;
gops->clock_gating = gp10b_ops.clock_gating;
gops->cde = gp10b_ops.cde;
/* Lone Functions */
gops->chip_init_gpu_characteristics =
@@ -278,7 +284,6 @@ int gp10b_init_hal(struct gk20a *g)
gk20a_init_debug_ops(gops);
gk20a_init_dbg_session_ops(gops);
gp10b_init_regops(gops);
gp10b_init_cde_ops(gops);
gp10b_init_therm_ops(gops);
gk20a_init_tsg_ops(gops);
gk20a_init_pramin_ops(gops);