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gpu: nvgpu: Reorg cde HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the cde sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I9343ce4985eb941a2610f5f11e8f01269ab68481 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master/r/1511673 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -1,7 +1,7 @@
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/*
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* GM20B CDE
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*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -26,7 +26,7 @@ enum programs {
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PROG_PASSTHROUGH = 6,
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};
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static void gm20b_cde_get_program_numbers(struct gk20a *g,
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void gm20b_cde_get_program_numbers(struct gk20a *g,
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u32 block_height_log2,
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int *hprog_out, int *vprog_out)
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{
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@@ -46,8 +46,3 @@ static void gm20b_cde_get_program_numbers(struct gk20a *g,
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*hprog_out = hprog;
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*vprog_out = vprog;
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}
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void gm20b_init_cde_ops(struct gpu_ops *gops)
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{
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gops->cde.get_program_numbers = gm20b_cde_get_program_numbers;
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}
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@@ -1,7 +1,7 @@
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/*
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* GM20B CDE
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*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -16,8 +16,10 @@
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#ifndef _NVHOST_GM20B_CDE
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#define _NVHOST_GM20B_CDE
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struct gpu_ops;
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struct gk20a;
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void gm20b_init_cde_ops(struct gpu_ops *gops);
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void gm20b_cde_get_program_numbers(struct gk20a *g,
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u32 block_height_log2,
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int *hprog_out, int *vprog_out);
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#endif
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@@ -199,6 +199,9 @@ static const struct gpu_ops gm20b_ops = {
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.pg_gr_load_gating_prod =
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gr_gm20b_pg_gr_load_gating_prod,
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},
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.cde = {
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.get_program_numbers = gm20b_cde_get_program_numbers
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},
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.chip_init_gpu_characteristics = gk20a_init_gpu_characteristics,
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.get_litter_value = gm20b_get_litter_value,
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};
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@@ -211,6 +214,7 @@ int gm20b_init_hal(struct gk20a *g)
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gops->ltc = gm20b_ops.ltc;
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gops->clock_gating = gm20b_ops.clock_gating;
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gops->cde = gm20b_ops.cde;
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/* Lone functions */
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gops->chip_init_gpu_characteristics =
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@@ -261,7 +265,6 @@ int gm20b_init_hal(struct gk20a *g)
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gm20b_init_regops(gops);
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gk20a_init_debug_ops(gops);
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gk20a_init_dbg_session_ops(gops);
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gm20b_init_cde_ops(gops);
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gm20b_init_therm_ops(gops);
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gk20a_init_tsg_ops(gops);
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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@@ -239,6 +239,11 @@ static const struct gpu_ops gp106_ops = {
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.pg_gr_load_gating_prod =
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gr_gp106_pg_gr_load_gating_prod,
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},
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.cde = {
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.get_program_numbers = gp10b_cde_get_program_numbers,
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.need_scatter_buffer = gp10b_need_scatter_buffer,
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.populate_scatter_buffer = gp10b_populate_scatter_buffer,
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},
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.xve = {
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.sw_init = xve_sw_init_gp106,
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.get_speed = xve_get_speed_gp106,
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@@ -268,6 +273,7 @@ int gp106_init_hal(struct gk20a *g)
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gops->ltc = gp106_ops.ltc;
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gops->clock_gating = gp106_ops.clock_gating;
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gops->cde = gp106_ops.cde;
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gops->xve = gp106_ops.xve;
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/* Lone functions */
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@@ -296,7 +302,6 @@ int gp106_init_hal(struct gk20a *g)
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gp106_init_clk_ops(gops);
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gp106_init_clk_arb_ops(gops);
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gp106_init_regops(gops);
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gp10b_init_cde_ops(gops);
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gk20a_init_tsg_ops(gops);
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gk20a_init_pramin_ops(gops);
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#if defined(CONFIG_GK20A_CYCLE_STATS)
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@@ -1,7 +1,7 @@
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/*
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* GP10B CDE
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*
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* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -30,7 +30,7 @@ enum gp10b_programs {
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GP10B_PROG_PASSTHROUGH = 8,
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};
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static void gp10b_cde_get_program_numbers(struct gk20a *g,
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void gp10b_cde_get_program_numbers(struct gk20a *g,
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u32 block_height_log2,
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int *hprog_out, int *vprog_out)
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{
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@@ -60,7 +60,7 @@ static void gp10b_cde_get_program_numbers(struct gk20a *g,
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*vprog_out = vprog;
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}
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static bool gp10b_need_scatter_buffer(struct gk20a *g)
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bool gp10b_need_scatter_buffer(struct gk20a *g)
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{
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return g->mm.bypass_smmu;
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}
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@@ -74,7 +74,7 @@ static u8 parity(u32 a)
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return (0x6996u >> a) & 1u;
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}
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static int gp10b_populate_scatter_buffer(struct gk20a *g,
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int gp10b_populate_scatter_buffer(struct gk20a *g,
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struct sg_table *sgt,
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size_t surface_size,
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void *scatter_buffer_ptr,
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@@ -140,10 +140,3 @@ static int gp10b_populate_scatter_buffer(struct gk20a *g,
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return 0;
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}
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void gp10b_init_cde_ops(struct gpu_ops *gops)
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{
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gops->cde.get_program_numbers = gp10b_cde_get_program_numbers;
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gops->cde.need_scatter_buffer = gp10b_need_scatter_buffer;
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gops->cde.populate_scatter_buffer = gp10b_populate_scatter_buffer;
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}
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@@ -1,7 +1,7 @@
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/*
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* GP10B CDE
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*
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* Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -16,8 +16,17 @@
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#ifndef _NVHOST_GP10B_CDE
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#define _NVHOST_GP10B_CDE
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struct gpu_ops;
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struct gk20a;
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struct sg_table;
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void gp10b_init_cde_ops(struct gpu_ops *gops);
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void gp10b_cde_get_program_numbers(struct gk20a *g,
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u32 block_height_log2,
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int *hprog_out, int *vprog_out);
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bool gp10b_need_scatter_buffer(struct gk20a *g);
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int gp10b_populate_scatter_buffer(struct gk20a *g,
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struct sg_table *sgt,
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size_t surface_size,
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void *scatter_buffer_ptr,
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size_t scatter_buffer_size);
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#endif
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@@ -207,6 +207,11 @@ static const struct gpu_ops gp10b_ops = {
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.pg_gr_load_gating_prod =
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gr_gp10b_pg_gr_load_gating_prod,
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},
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.cde = {
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.get_program_numbers = gp10b_cde_get_program_numbers,
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.need_scatter_buffer = gp10b_need_scatter_buffer,
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.populate_scatter_buffer = gp10b_populate_scatter_buffer,
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},
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.chip_init_gpu_characteristics = gp10b_init_gpu_characteristics,
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.get_litter_value = gp10b_get_litter_value,
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};
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@@ -219,6 +224,7 @@ int gp10b_init_hal(struct gk20a *g)
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gops->ltc = gp10b_ops.ltc;
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gops->clock_gating = gp10b_ops.clock_gating;
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gops->cde = gp10b_ops.cde;
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/* Lone Functions */
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gops->chip_init_gpu_characteristics =
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@@ -278,7 +284,6 @@ int gp10b_init_hal(struct gk20a *g)
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gk20a_init_debug_ops(gops);
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gk20a_init_dbg_session_ops(gops);
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gp10b_init_regops(gops);
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gp10b_init_cde_ops(gops);
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gp10b_init_therm_ops(gops);
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gk20a_init_tsg_ops(gops);
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gk20a_init_pramin_ops(gops);
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