nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Remove pmupstate flag from gpu_ops

Browse Source 
Replace pmupstate boolean flag in gpu_ops with entry in
common flag system.

The new common flag is NVGPU_PMU_PSTATE

Jira NVGPU-74

Change-Id: I4e1ba922a48145b1cf3488b6f14fde78107adb5b
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514059
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
This commit is contained in:
Sunny He
2017-06-27 16:08:48 -07:00
committed by mobile promotions
parent b260df606b
commit 92f6eb016c
6 changed files with 9 additions and 8 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/gk20a/gk20a.c
View File

@@ -138,7 +138,7 @@ int gk20a_prepare_poweroff(struct gk20a *g)
ret |= g->ops.clk.suspend_clk_support(g);
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
if (g->ops.pmupstate)
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE))
gk20a_deinit_pstate_support(g);
#endif
g->power_on = false;
@@ -252,7 +252,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
}
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
if (g->ops.pmupstate) {
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
err = gk20a_init_pstate_support(g);
if (err) {
nvgpu_err(g, "failed to init pstates");
@@ -276,7 +276,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
}
#ifdef CONFIG_ARCH_TEGRA_18x_SOC
if (g->ops.pmupstate) {
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
err = gk20a_init_pstate_pmu_support(g);
if (err) {
nvgpu_err(g, "failed to init pstates");

1
drivers/gpu/nvgpu/gk20a/gk20a.h
View File

@@ -994,7 +994,6 @@ struct gpu_ops {
} priv_ring;
bool privsecurity;
bool securegpccs;
bool pmupstate;
};
struct nvgpu_bios_ucode {

2
drivers/gpu/nvgpu/gm20b/hal_gm20b.c
View File

@@ -352,7 +352,7 @@ int gm20b_init_hal(struct gk20a *g)
gops->get_litter_value = gm20b_ops.get_litter_value;
gops->securegpccs = false;
gops->pmupstate = false;
__nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
#ifdef CONFIG_TEGRA_ACR
if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
gops->privsecurity = 1;

4
drivers/gpu/nvgpu/gp106/hal_gp106.c
View File

@@ -62,6 +62,7 @@
#include <nvgpu/debug.h>
#include <nvgpu/bug.h>
#include <nvgpu/bus.h>
#include <nvgpu/enabled.h>
#include <nvgpu/hw/gp106/hw_proj_gp106.h>
#include <nvgpu/hw/gp106/hw_fifo_gp106.h>
@@ -417,8 +418,7 @@ int gp106_init_hal(struct gk20a *g)
gops->privsecurity = 1;
gops->securegpccs = 1;
gops->pmupstate = true;
__nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, true);
g->bootstrap_owner = LSF_FALCON_ID_SEC2;
gp106_init_gr(gops);

3
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
View File

@@ -364,7 +364,8 @@ int gp10b_init_hal(struct gk20a *g)
gp10b_ops.chip_init_gpu_characteristics;
gops->get_litter_value = gp10b_ops.get_litter_value;
gops->pmupstate = false;
__nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false);
#ifdef CONFIG_TEGRA_ACR
if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
gops->privsecurity = 0;

1
drivers/gpu/nvgpu/include/nvgpu/enabled.h
View File

@@ -42,6 +42,7 @@ struct gk20a;
*/
/* perfmon enabled or disabled for PMU */
#define NVGPU_PMU_PERFMON 48
#define NVGPU_PMU_PSTATE 49
/*
* Must be greater than the largest bit offset in the above list.