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gpu: nvgpu: fix MISRA 5.7 violation in gr.setup unit

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Below MISRA 5.7 violation is reported in common.gr.setup unit

nvgpu/drivers/gpu/nvgpu/common/gr/gr_setup.c:218:
identifier_reuse: Identifier "class" is already used to represent a type.
nvgpu/drivers/gpu/nvgpu/include/nvgpu/nvgpu_common.h:27:
type_declaration: Declaring a type with identifier "class".

Fix this by changing variable name "class" to "class_num"

Jira NVGPU-3407

Change-Id: I7517995b105c65c2fa78f4959aad9e3f04585f02
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2114363
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-05-03 16:37:02 +05:30
committed by mobile promotions
parent 6326f67702
commit 9ad6709d7e
1 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/nvgpu/common/gr/gr_setup.c
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@@ -215,11 +215,11 @@ int nvgpu_gr_setup_set_preemption_mode(struct nvgpu_channel *ch,
struct gk20a *g = ch->g;
struct nvgpu_tsg *tsg;
struct vm_gk20a *vm;
u32 class;
u32 class_num;
int err = 0;
class = ch->obj_class;
if (class == 0U) {
class_num = ch->obj_class;
if (class_num == 0U) {
return -EINVAL;
}
@@ -256,7 +256,7 @@ int nvgpu_gr_setup_set_preemption_mode(struct nvgpu_channel *ch,
graphics_preempt_mode,
compute_preempt_mode);
err = nvgpu_gr_obj_ctx_set_ctxsw_preemption_mode(g, g->gr->config,
g->gr->gr_ctx_desc, gr_ctx, vm, class,
g->gr->gr_ctx_desc, gr_ctx, vm, class_num,
graphics_preempt_mode, compute_preempt_mode);
if (err != 0) {
nvgpu_err(g, "set_ctxsw_preemption_mode failed");