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gpu: nvgpu: fix MISRA errors in runlist

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Fix some mistakes from commit 0fbc1a2652 (gpu: nvgpu: avoid recursion in
runlist construction) and commit 998bf379df (gpu: nvgpu: add
runlist_append_tsg) for MISRA rules 10.3 and 10.4.

- cast a sizeof to u32 in a calculation to match in size,
- make the NVGPU_FIFO_RUNLIST_INTERLEAVE_LEVEL_* constants unsigned to make
  comparisons match in signedness.

Jira NVGPU-1174

Change-Id: I00aa9758ca4352d8eb53a0e8ded42a1ba3b14561
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1938069
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Holtta
2018-10-30 17:29:05 +02:00
committed by mobile promotions
parent e2c08f4f7b
commit 9adc7a6542
2 changed files with 5 additions and 7 deletions
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2
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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@@ -3330,7 +3330,7 @@ static u32 nvgpu_runlist_append_tsg(struct gk20a *g,
struct tsg_gk20a *tsg)
{
struct fifo_gk20a *f = &g->fifo;
u32 runlist_entry_words = f->runlist_entry_size / sizeof(u32);
u32 runlist_entry_words = f->runlist_entry_size / (u32)sizeof(u32);
struct channel_gk20a *ch;
u32 count = 0;