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nvgpu: move .load_timestamp_prod to NON_FUSA and MIG

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.load_timestamp_prod was defined protected by CONFIG_NVGPU_HAL_NON_FUSA
and CONFIG_NVGPU_MIG. This patch moves the implementation of
.load_timestamp_prod to the same macros.

Jira GVSCI-9976

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I3204f3e7085d4098be2ab73e3b5300214ef04cfa
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2659002
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Aparna Das <aparnad@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Richard Zhao
2022-01-24 14:54:11 -08:00
committed by mobile promotions
parent 1b3ae7eb92
commit a3f3249c76
5 changed files with 11 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/common/grmgr/grmgr.c
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@@ -42,7 +42,7 @@ int nvgpu_init_gr_manager(struct gk20a *g)
int err = 0; int err = 0;
const struct nvgpu_device *gr_dev = NULL; const struct nvgpu_device *gr_dev = NULL;
#ifdef CONFIG_NVGPU_NON_FUSA #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_MIG)
if (g->ops.grmgr.load_timestamp_prod != NULL) { if (g->ops.grmgr.load_timestamp_prod != NULL) {
g->ops.grmgr.load_timestamp_prod(g); g->ops.grmgr.load_timestamp_prod(g);
} }

4
drivers/gpu/nvgpu/hal/grmgr/grmgr_ga10b.c
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@@ -1,7 +1,7 @@
/* /*
* GA10B GR MANAGER * GA10B GR MANAGER
* *
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -967,6 +967,7 @@ int ga10b_grmgr_get_mig_gpu_instance_config(struct gk20a *g,
#endif #endif
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_MIG)
void ga10b_grmgr_load_smc_arb_timestamp_prod(struct gk20a *g) void ga10b_grmgr_load_smc_arb_timestamp_prod(struct gk20a *g)
{ {
u32 reg_val; u32 reg_val;
@@ -979,6 +980,7 @@ void ga10b_grmgr_load_smc_arb_timestamp_prod(struct gk20a *g)
nvgpu_writel(g, smcarb_timestamp_ctrl_r(), reg_val); nvgpu_writel(g, smcarb_timestamp_ctrl_r(), reg_val);
} }
#endif
int ga10b_grmgr_discover_gpc_ids(struct gk20a *g, int ga10b_grmgr_discover_gpc_ids(struct gk20a *g,
u32 num_gpc, struct nvgpu_gpc *gpcs) u32 num_gpc, struct nvgpu_gpc *gpcs)

4
drivers/gpu/nvgpu/hal/grmgr/grmgr_ga10b.h
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@@ -1,7 +1,7 @@
/* /*
* GA10B GR MANAGER * GA10B GR MANAGER
* *
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -42,7 +42,9 @@ int ga10b_grmgr_get_mig_gpu_instance_config(struct gk20a *g,
void ga10b_grmgr_get_gpcgrp_count(struct gk20a *g); void ga10b_grmgr_get_gpcgrp_count(struct gk20a *g);
#endif #endif
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_MIG)
void ga10b_grmgr_load_smc_arb_timestamp_prod(struct gk20a *g); void ga10b_grmgr_load_smc_arb_timestamp_prod(struct gk20a *g);
#endif
int ga10b_grmgr_discover_gpc_ids(struct gk20a *g, int ga10b_grmgr_discover_gpc_ids(struct gk20a *g,
u32 num_gpc, struct nvgpu_gpc *gpcs); u32 num_gpc, struct nvgpu_gpc *gpcs);

4
drivers/gpu/nvgpu/hal/init/hal_ga100.c
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@@ -1,7 +1,7 @@
/* /*
* GA100 Tegra HAL interface * GA100 Tegra HAL interface
* *
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -1722,7 +1722,7 @@ static const struct gops_grmgr ga100_ops_grmgr = {
#else #else
.init_gr_manager = nvgpu_init_gr_manager, .init_gr_manager = nvgpu_init_gr_manager,
#endif #endif
#ifdef CONFIG_NVGPU_NON_FUSA #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_MIG)
.load_timestamp_prod = ga10b_grmgr_load_smc_arb_timestamp_prod, .load_timestamp_prod = ga10b_grmgr_load_smc_arb_timestamp_prod,
#endif #endif
.discover_gpc_ids = ga10b_grmgr_discover_gpc_ids, .discover_gpc_ids = ga10b_grmgr_discover_gpc_ids,

4
drivers/gpu/nvgpu/hal/init/hal_ga10b.c
View File

@@ -1,7 +1,7 @@
/* /*
* GA10B Tegra HAL interface * GA10B Tegra HAL interface
* *
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved. * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
* *
* Permission is hereby granted, free of charge, to any person obtaining a * Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"), * copy of this software and associated documentation files (the "Software"),
@@ -1699,7 +1699,7 @@ static const struct gops_grmgr ga10b_ops_grmgr = {
#else #else
.init_gr_manager = nvgpu_init_gr_manager, .init_gr_manager = nvgpu_init_gr_manager,
#endif #endif
#ifdef CONFIG_NVGPU_NON_FUSA #if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_MIG)
.load_timestamp_prod = ga10b_grmgr_load_smc_arb_timestamp_prod, .load_timestamp_prod = ga10b_grmgr_load_smc_arb_timestamp_prod,
#endif #endif
.discover_gpc_ids = ga10b_grmgr_discover_gpc_ids, .discover_gpc_ids = ga10b_grmgr_discover_gpc_ids,