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gpu: nvgpu: ga10b: slcg and blcg update for PMU

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Load register configuration for SLCG and BLCG for PMU.

Bug 3452217

Change-Id: Ib54077ee00d0b9247db8d792e5ed566fd4ca2efd
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2641365
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
mkumbar
2021-12-14 00:52:11 +05:30
committed by mobile promotions
parent d086c678fd
commit b92e8530fc
1 changed files with 6 additions and 0 deletions
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6
drivers/gpu/nvgpu/common/pmu/pmu_rtos_init.c
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@@ -395,6 +395,12 @@ int nvgpu_pmu_rtos_init(struct gk20a *g)
}
#endif
if (nvgpu_is_enabled(g, NVGPU_PMU_NEXT_CORE_ENABLED)) {
/* Load register configuration for SLCG and BLCG for PMU */
nvgpu_cg_slcg_pmu_load_enable(g);
nvgpu_cg_blcg_pmu_load_enable(g);
}
if (!nvgpu_is_enabled(g, NVGPU_PMU_NEXT_CORE_ENABLED)) {
/*
* clear halt interrupt to avoid PMU-RTOS ucode