gpu: nvgpu: Do not enable replayable fault for context

Do not allow enabling replayable page faults in instace block.

JIRA NVGPU-714

Change-Id: I9c48497e31798ab354a86d460a299e65774b388a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1772863
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-07-06 08:50:36 -07:00
committed by mobile promotions
parent 6d8d5eb177
commit bbebc611bc

View File

@@ -38,30 +38,6 @@
#include <nvgpu/hw/gp10b/hw_ram_gp10b.h>
#include <nvgpu/hw/gp10b/hw_top_gp10b.h>
static void gp10b_set_pdb_fault_replay_flags(struct gk20a *g,
struct nvgpu_mem *mem)
{
u32 val;
nvgpu_log_fn(g, " ");
val = nvgpu_mem_rd32(g, mem,
ram_in_page_dir_base_fault_replay_tex_w());
val &= ~ram_in_page_dir_base_fault_replay_tex_m();
val |= ram_in_page_dir_base_fault_replay_tex_true_f();
nvgpu_mem_wr32(g, mem,
ram_in_page_dir_base_fault_replay_tex_w(), val);
val = nvgpu_mem_rd32(g, mem,
ram_in_page_dir_base_fault_replay_gcc_w());
val &= ~ram_in_page_dir_base_fault_replay_gcc_m();
val |= ram_in_page_dir_base_fault_replay_gcc_true_f();
nvgpu_mem_wr32(g, mem,
ram_in_page_dir_base_fault_replay_gcc_w(), val);
nvgpu_log_fn(g, "done");
}
int channel_gp10b_commit_userd(struct channel_gk20a *c)
{
u32 addr_lo;
@@ -141,9 +117,6 @@ int channel_gp10b_setup_ramfc(struct channel_gk20a *c,
pbdma_runlist_timeslice_timescale_3_f() |
pbdma_runlist_timeslice_enable_true_f());
if (flags & NVGPU_GPFIFO_FLAGS_REPLAYABLE_FAULTS_ENABLE)
gp10b_set_pdb_fault_replay_flags(c->g, mem);
nvgpu_mem_wr32(g, mem, ram_fc_chid_w(), ram_fc_chid_id_f(c->chid));
if (c->is_privileged_channel) {