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gpu: nvgpu: add gops.fifo.ch_abort_clean_up

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Channel abort clean up is only needed by native and vgpu driver but not
RM server. RM server expects guest will clean up itself. RM server
should not set the callback.

Jira VQRM-3058

Change-Id: I11b49b6f2d51c871e31de16955d487dca82609cb
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1679705
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Richard Zhao
2018-03-16 11:11:27 -07:00
committed by mobile promotions
parent 5c27ac91fd
commit c5f03db98a
10 changed files with 14 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/gk20a/channel_gk20a.c
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@@ -220,7 +220,8 @@ void gk20a_channel_abort(struct channel_gk20a *ch, bool channel_preempt)
if (channel_preempt && gk20a_is_channel_marked_as_tsg(ch))
ch->g->ops.fifo.preempt_channel(ch->g, ch->chid);
gk20a_channel_abort_clean_up(ch);
if (ch->g->ops.fifo.ch_abort_clean_up)
ch->g->ops.fifo.ch_abort_clean_up(ch);
}
int gk20a_wait_channel_idle(struct channel_gk20a *ch)

6
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
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@@ -1432,7 +1432,8 @@ void gk20a_fifo_abort_tsg(struct gk20a *g, u32 tsgid, bool preempt)
nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry) {
if (gk20a_channel_get(ch)) {
ch->has_timedout = true;
gk20a_channel_abort_clean_up(ch);
if (ch->g->ops.fifo.ch_abort_clean_up)
ch->g->ops.fifo.ch_abort_clean_up(ch);
gk20a_channel_put(ch);
}
}
@@ -2016,7 +2017,8 @@ int gk20a_fifo_tsg_unbind_channel(struct channel_gk20a *ch)
if (!tsg_timedout)
g->ops.fifo.enable_tsg(tsg);
gk20a_channel_abort_clean_up(ch);
if (ch->g->ops.fifo.ch_abort_clean_up)
ch->g->ops.fifo.ch_abort_clean_up(ch);
return 0;

1
drivers/gpu/nvgpu/gk20a/gk20a.h
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@@ -628,6 +628,7 @@ struct gpu_ops {
struct tsg_gk20a *tsg);
u32 (*get_preempt_timeout)(struct gk20a *g);
void (*post_event_id)(struct tsg_gk20a *tsg, int event_id);
void (*ch_abort_clean_up)(struct channel_gk20a *ch);
#ifdef CONFIG_TEGRA_GK20A_NVHOST
int (*alloc_syncpt_buf)(struct channel_gk20a *c,
u32 syncpt_id, struct nvgpu_mem *syncpt_buf);

1
drivers/gpu/nvgpu/gm20b/hal_gm20b.c
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@@ -438,6 +438,7 @@ static const struct gpu_ops gm20b_ops = {
.tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/gp106/hal_gp106.c
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@@ -499,6 +499,7 @@ static const struct gpu_ops gp106_ops = {
.tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
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@@ -470,6 +470,7 @@ static const struct gpu_ops gp10b_ops = {
.tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/gv100/hal_gv100.c
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@@ -511,6 +511,7 @@ static const struct gpu_ops gv100_ops = {
.tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
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@@ -528,6 +528,7 @@ static const struct gpu_ops gv11b_ops = {
.tsg_bind_channel = gk20a_tsg_bind_channel,
.tsg_unbind_channel = gk20a_fifo_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gv11b_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/vgpu/gp10b/vgpu_hal_gp10b.c
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@@ -344,6 +344,7 @@ static const struct gpu_ops vgpu_gp10b_ops = {
.tsg_bind_channel = vgpu_tsg_bind_channel,
.tsg_unbind_channel = vgpu_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = gk20a_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gk20a_fifo_free_syncpt_buf,

1
drivers/gpu/nvgpu/vgpu/gv11b/vgpu_hal_gv11b.c
View File

@@ -387,6 +387,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.tsg_bind_channel = vgpu_gv11b_tsg_bind_channel,
.tsg_unbind_channel = vgpu_tsg_unbind_channel,
.post_event_id = gk20a_tsg_event_id_post_event,
.ch_abort_clean_up = gk20a_channel_abort_clean_up,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.alloc_syncpt_buf = vgpu_gv11b_fifo_alloc_syncpt_buf,
.free_syncpt_buf = gv11b_fifo_free_syncpt_buf,