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gpu: nvgpu: remove ZBC_STENCIL support for safety build

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Add CONFIG_NVGPU_GRAPHICS flag to enable the NVGPU_SUPPORT_ZBC_STENCIL
support.

Jira NVGPU-3580

Change-Id: I630430d5f2cca4a1230bdfe99e46346573030232
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2135369
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-06-12 15:28:43 -07:00
committed by mobile promotions
parent a3d30adab2
commit c85d4c9e7f
5 changed files with 10 additions and 0 deletions
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2
drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_gv11b.c
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@@ -40,7 +40,9 @@ void vgpu_gv11b_init_gpu_characteristics(struct gk20a *g)
nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_USERMODE_SUBMIT, true);
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true);
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false);

2
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
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@@ -1118,7 +1118,9 @@ int gm20b_init_hal(struct gk20a *g)
#endif
}
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false);
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, false);
nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false);
nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false);

2
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
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@@ -1199,7 +1199,9 @@ int gp10b_init_hal(struct gk20a *g)
#endif
}
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false);
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);
nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false);
nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false);

2
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -1370,7 +1370,9 @@ int gv11b_init_hal(struct gk20a *g)
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_MULTIPLE_WPR, false);
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true);
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, true);

2
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -1504,7 +1504,9 @@ int tu104_init_hal(struct gk20a *g)
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_SEC2_RTOS, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PMU_RTOS_FBQ, true);
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true);
#endif
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true);
nvgpu_set_enabled(g, NVGPU_SUPPORT_SEC2_VM, true);