gpu: nvgpu: cond. compilation of tegra dvfs code

Protect the code dependent on tegra dvfs and bpmp dvfs code under the
config flags CONFIG_TEGRA_DVFS and CONFIG_NV_TEGRA_BPMP.

Also, update clk_config_dvfs and clk_program_na_gpc_pll to handle the
error value returned from g->ops.clk.predict_mv_at_hz_cur_tfloor.

Bug 2834141

Change-Id: I124d29f22e59fd6af7801ca859c4470483c8f7d8
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306433
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kamble
2020-03-02 16:41:14 +05:30
committed by Alex Waterman
parent bf353cea6c
commit cc043e1506
4 changed files with 53 additions and 6 deletions

View File

@@ -18,8 +18,14 @@
#include <linux/clk.h>
#ifdef CONFIG_TEGRA_DVFS
#include <soc/tegra/tegra-dvfs.h>
#endif /* CONFIG_TEGRA_DVFS */
#ifdef CONFIG_NV_TEGRA_BPMP
#include <soc/tegra/tegra-bpmp-dvfs.h>
#endif /* CONFIG_NV_TEGRA_BPMP */
#include <nvgpu/pmu/clk/clk.h>
#include "clk.h"
@@ -85,6 +91,7 @@ static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct gk20a *g)
{
struct gk20a_platform *platform = gk20a_get_platform(dev_from_gk20a(g));
#ifdef CONFIG_TEGRA_DVFS
/*
* On Tegra platforms with GPCPLL bus (gbus) GPU tegra_clk clock exposed
* to frequency governor is a shared user on the gbus. The latter can be
@@ -93,10 +100,14 @@ static unsigned long nvgpu_linux_get_fmax_at_vmin_safe(struct gk20a *g)
if (g->clk.tegra_clk)
return tegra_dvfs_get_fmax_at_vmin_safe_t(
g->clk.tegra_clk_parent);
#endif
if (platform->maxmin_clk_id)
if (platform->maxmin_clk_id) {
#ifdef CONFIG_NV_TEGRA_BPMP
return tegra_bpmp_dvfs_get_fmax_at_vmin(
platform->maxmin_clk_id);
#endif
}
return 0;
}
@@ -117,8 +128,12 @@ static u32 nvgpu_linux_get_ref_clock_rate(struct gk20a *g)
static int nvgpu_linux_predict_mv_at_hz_cur_tfloor(struct clk_gk20a *clk,
unsigned long rate)
{
#ifdef CONFIG_TEGRA_DVFS
return tegra_dvfs_predict_mv_at_hz_cur_tfloor(
clk->tegra_clk_parent, rate);
#else
return -EINVAL;
#endif
}
static unsigned long nvgpu_linux_get_maxrate(struct gk20a *g, u32 api_domain)
@@ -128,7 +143,11 @@ static unsigned long nvgpu_linux_get_maxrate(struct gk20a *g, u32 api_domain)
switch (api_domain) {
case CTRL_CLK_DOMAIN_GPCCLK:
#ifdef CONFIG_TEGRA_DVFS
ret = tegra_dvfs_get_maxrate(g->clk.tegra_clk_parent);
#else
ret = 0;
#endif
/* If dvfs not supported */
if (ret == 0) {
int err = nvgpu_clk_arb_get_arbiter_clk_range(g,