gpu: nvgpu: compile-out debug unit

debug unit is not need to for safety build, so compile out it JIRA NVGPU-3542 Change-Id: I60cc256a5659e72ae2e647ec4f1a810ba4aa959d Signed-off-by: Sagar Kadamati <skadamati@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2133419 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2025-12-25 11:04:51 +03:00 · 2019-06-10 12:50:26 +05:30
parent eaae1afdae
commit d2444e85ed
26 changed files with 157 additions and 1 deletions
--- a/drivers/gpu/nvgpu/os/linux/cde.c
+++ b/drivers/gpu/nvgpu/os/linux/cde.c
@@ -21,7 +21,9 @@
 #include <linux/dma-buf.h>
 #include <uapi/linux/nvgpu.h>

+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif

 #include <nvgpu/dma.h>
 #include <nvgpu/gmmu.h>
@@ -102,7 +104,9 @@ __must_hold(&cde_app->mutex)
 	struct vm_gk20a *vm = ch->vm;
 	struct nvgpu_cbc *cbc = g->cbc;

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_cde_remove_ctx(cde_ctx);
+#endif

 	/* release mapped memory */
 	gk20a_deinit_cde_img(cde_ctx);
@@ -794,7 +798,9 @@ __releases(&cde_app->mutex)
 	struct gk20a *g = &cde_ctx->l->g;

 	nvgpu_log(g, gpu_dbg_cde_ctx, "releasing use on %p", cde_ctx);
+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_cde_release(cde_ctx);
+#endif

 	nvgpu_mutex_acquire(&cde_app->mutex);

@@ -881,7 +887,9 @@ __must_hold(&cde_app->mutex)
 				cde_ctx, cde_app->ctx_count,
 				cde_app->ctx_usecount,
 				cde_app->ctx_count_top);
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_cde_get_context(cde_ctx);
+#endif

 		/* deleter work may be scheduled, but in_use prevents it */
 		cde_ctx->in_use = true;
@@ -906,7 +914,9 @@ __must_hold(&cde_app->mutex)
 		return cde_ctx;
 	}

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_cde_get_context(cde_ctx);
+#endif
 	cde_ctx->in_use = true;
 	cde_ctx->is_temporary = true;
 	cde_app->ctx_usecount++;
@@ -970,7 +980,9 @@ static struct gk20a_cde_ctx *gk20a_cde_allocate_context(struct nvgpu_os_linux *l
 			gk20a_cde_ctx_deleter_fn);

 	nvgpu_log(g, gpu_dbg_fn | gpu_dbg_cde_ctx, "cde: allocated %p", cde_ctx);
+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_cde_allocate_context(cde_ctx);
+#endif
 	return cde_ctx;
 }

@@ -1265,7 +1277,9 @@ __releases(&cde_app->mutex)
 	if (!channel_idle)
 		return;

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_cde_finished_ctx_cb(cde_ctx);
+#endif
 	nvgpu_log(g, gpu_dbg_fn | gpu_dbg_cde_ctx, "cde: finished %p", cde_ctx);
 	if (!cde_ctx->in_use)
 		nvgpu_log_info(g, "double finish cde context %p on channel %p",
--- a/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c
+++ b/drivers/gpu/nvgpu/os/linux/fecs_trace_linux.c
@@ -18,7 +18,9 @@
 #include <linux/ktime.h>
 #include <linux/uaccess.h>
 #include <linux/poll.h>
+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif
 #include <uapi/linux/nvgpu.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/log.h>
@@ -747,7 +749,9 @@ void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
 	nvgpu_gr_fecs_trace_write_entry(g, &entry);
 	nvgpu_gr_fecs_trace_wake_up(g, 0);

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_channel_reset(~0, tsg->tsgid);
+#endif
 }

 /*
--- a/drivers/gpu/nvgpu/os/linux/intr.c
+++ b/drivers/gpu/nvgpu/os/linux/intr.c
@@ -11,7 +11,9 @@
 * more details.
 */

+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif
 #include <linux/irqreturn.h>

 #include <nvgpu/gk20a.h>
@@ -24,7 +26,9 @@ irqreturn_t nvgpu_intr_stall(struct gk20a *g)
 {
 	u32 mc_intr_0;

+#ifdef CONFIG_NVGPU_TRACE
 	trace_mc_gk20a_intr_stall(g->name);
+#endif

 	if (!g->power_on)
 		return IRQ_NONE;
@@ -38,7 +42,9 @@ irqreturn_t nvgpu_intr_stall(struct gk20a *g)

 	nvgpu_atomic_inc(&g->hw_irq_stall_count);

+#ifdef CONFIG_NVGPU_TRACE
 	trace_mc_gk20a_intr_stall_done(g->name);
+#endif

 	return IRQ_WAKE_THREAD;
 }
@@ -49,7 +55,9 @@ irqreturn_t nvgpu_intr_thread_stall(struct gk20a *g)

 	nvgpu_log(g, gpu_dbg_intr, "interrupt thread launched");

+#ifdef CONFIG_NVGPU_TRACE
 	trace_mc_gk20a_intr_thread_stall(g->name);
+#endif

 	hw_irq_count = nvgpu_atomic_read(&g->hw_irq_stall_count);
 	g->ops.mc.isr_stall(g);
@@ -59,7 +67,9 @@ irqreturn_t nvgpu_intr_thread_stall(struct gk20a *g)

 	nvgpu_cond_broadcast(&g->sw_irq_stall_last_handled_cond);

+#ifdef CONFIG_NVGPU_TRACE
 	trace_mc_gk20a_intr_thread_stall_done(g->name);
+#endif

 	return IRQ_HANDLED;
 }
--- a/drivers/gpu/nvgpu/os/linux/ioctl_as.c
+++ b/drivers/gpu/nvgpu/os/linux/ioctl_as.c
@@ -1,7 +1,7 @@
 /*
 * GK20A Address Spaces
 *
- * Copyright (c) 2011-2018, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2019, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
@@ -17,7 +17,9 @@
 #include <linux/uaccess.h>
 #include <linux/fs.h>

+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif

 #include <uapi/linux/nvgpu.h>

@@ -359,7 +361,9 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 	nvgpu_speculation_barrier();
 	switch (cmd) {
 	case NVGPU_AS_IOCTL_BIND_CHANNEL:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_bind_channel(g->name);
+#endif
 		err = gk20a_as_ioctl_bind_channel(as_share,
 			       (struct nvgpu_as_bind_channel_args *)buf);

@@ -374,33 +378,45 @@ long gk20a_as_dev_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
 		args.page_size = args32->page_size;
 		args.flags = args32->flags;
 		args.o_a.offset = args32->o_a.offset;
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_alloc_space(g->name);
+#endif
 		err = gk20a_as_ioctl_alloc_space(as_share, &args);
 		args32->o_a.offset = args.o_a.offset;
 		break;
 	}
 	case NVGPU_AS_IOCTL_ALLOC_SPACE:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_alloc_space(g->name);
+#endif
 		err = gk20a_as_ioctl_alloc_space(as_share,
 				(struct nvgpu_as_alloc_space_args *)buf);
 		break;
 	case NVGPU_AS_IOCTL_FREE_SPACE:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_free_space(g->name);
+#endif
 		err = gk20a_as_ioctl_free_space(as_share,
 				(struct nvgpu_as_free_space_args *)buf);
 		break;
 	case NVGPU_AS_IOCTL_MAP_BUFFER_EX:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_map_buffer(g->name);
+#endif
 		err = gk20a_as_ioctl_map_buffer_ex(as_share,
 				(struct nvgpu_as_map_buffer_ex_args *)buf);
 		break;
 	case NVGPU_AS_IOCTL_UNMAP_BUFFER:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_unmap_buffer(g->name);
+#endif
 		err = gk20a_as_ioctl_unmap_buffer(as_share,
 				(struct nvgpu_as_unmap_buffer_args *)buf);
 		break;
 	case NVGPU_AS_IOCTL_GET_VA_REGIONS:
+#ifdef CONFIG_NVGPU_TRACE
 		trace_gk20a_as_ioctl_get_va_regions(g->name);
+#endif
 		err = gk20a_as_ioctl_get_va_regions(as_share,
 				(struct nvgpu_as_get_va_regions_args *)buf);
 		break;
--- a/drivers/gpu/nvgpu/os/linux/ioctl_channel.c
+++ b/drivers/gpu/nvgpu/os/linux/ioctl_channel.c
@@ -16,7 +16,9 @@
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif
 #include <linux/file.h>
 #include <linux/anon_inodes.h>
 #include <linux/dma-buf.h>
@@ -56,6 +58,7 @@
 		(sizeof(struct gk20a_cs_snapshot_fifo) +	\
 		sizeof(struct gk20a_cs_snapshot_fifo_entry) * 256)

+#ifdef CONFIG_NVGPU_TRACE
 static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode)
 {
 	switch (graphics_preempt_mode) {
@@ -77,7 +80,9 @@ static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode)
 		return "?";
 	}
 }
+#endif

+#ifdef CONFIG_NVGPU_TRACE
 static void gk20a_channel_trace_sched_param(
 	void (*trace)(int chid, int tsgid, pid_t pid, u32 timeslice,
 		u32 timeout, const char *interleave,
@@ -99,6 +104,7 @@ static void gk20a_channel_trace_sched_param(
 		gr_gk20a_compute_preempt_mode_name(
 			nvgpu_gr_ctx_get_compute_preemption_mode(tsg->gr_ctx)));
 }
+#endif

 /*
 * Although channels do have pointers back to the gk20a struct that they were
@@ -423,7 +429,9 @@ int gk20a_channel_release(struct inode *inode, struct file *filp)
 		goto channel_release;
 	}

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_channel_release(dev_name(dev_from_gk20a(g)));
+#endif

 	nvgpu_channel_close(ch);
 	gk20a_channel_free_error_notifiers(ch);
@@ -459,7 +467,9 @@ static int __gk20a_channel_open(struct gk20a *g,
 	if (!g)
 		return -ENODEV;

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_channel_open(dev_name(dev_from_gk20a(g)));
+#endif

 	priv = nvgpu_kzalloc(g, sizeof(*priv));
 	if (!priv) {
@@ -483,8 +493,10 @@ static int __gk20a_channel_open(struct gk20a *g,
 		goto fail_busy;
 	}

+#ifdef CONFIG_NVGPU_TRACE
 	gk20a_channel_trace_sched_param(
 		trace_gk20a_channel_sched_defaults, ch);
+#endif

 	priv->g = g;
 	priv->c = ch;
@@ -1261,8 +1273,10 @@ long gk20a_channel_ioctl(struct file *filp,
 		nvgpu_log(g, gpu_dbg_gpu_dbg, "setting timeout (%d ms) for chid %d",
 			   timeout, ch->chid);
 		ch->ctxsw_timeout_max_ms = timeout;
+#ifdef CONFIG_NVGPU_TRACE
 		gk20a_channel_trace_sched_param(
 			trace_gk20a_channel_set_timeout, ch);
+#endif
 		break;
 	}
 	case NVGPU_IOCTL_CHANNEL_SET_TIMEOUT_EX:
@@ -1276,8 +1290,10 @@ long gk20a_channel_ioctl(struct file *filp,
 			   timeout, ch->chid);
 		ch->ctxsw_timeout_max_ms = timeout;
 		ch->ctxsw_timeout_debug_dump = ctxsw_timeout_debug_dump;
+#ifdef CONFIG_NVGPU_TRACE
 		gk20a_channel_trace_sched_param(
 			trace_gk20a_channel_set_timeout, ch);
+#endif
 		break;
 	}
 	case NVGPU_IOCTL_CHANNEL_GET_TIMEDOUT:
--- a/drivers/gpu/nvgpu/os/linux/linux-channel.c
+++ b/drivers/gpu/nvgpu/os/linux/linux-channel.c
@@ -38,7 +38,9 @@

 #include <linux/uaccess.h>
 #include <linux/dma-buf.h>
+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif
 #include <uapi/linux/nvgpu.h>

 #include "sync_sema_android.h"
@@ -616,6 +618,7 @@ static void trace_write_pushbuffer(struct nvgpu_channel *c,
 	}

 	if (mem) {
+#ifdef CONFIG_NVGPU_TRACE
 		u32 i;
 		/*
 		 * Write in batches of 128 as there seems to be a limit
@@ -629,6 +632,7 @@ static void trace_write_pushbuffer(struct nvgpu_channel *c,
 				offset + i * sizeof(u32),
 				mem);
 		}
+#endif
 		dma_buf_vunmap(dmabuf, mem);
 	}
 }
--- a/drivers/gpu/nvgpu/os/linux/module.c
+++ b/drivers/gpu/nvgpu/os/linux/module.c
@@ -85,7 +85,9 @@
 #define GK20A_WAIT_FOR_IDLE_MS	2000

 #define CREATE_TRACE_POINTS
+#ifdef CONFIG_NVGPU_TRACE
 #include <trace/events/gk20a.h>
+#endif

 static int nvgpu_kernel_shutdown_notification(struct notifier_block *nb,
 					unsigned long event, void *unused)
@@ -371,7 +373,9 @@ int gk20a_pm_finalize_poweron(struct device *dev)
 	if (g->power_on)
 		goto done;

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_finalize_poweron(dev_name(dev));
+#endif

 	/* Increment platform power refcount */
 	if (platform->busy) {
@@ -445,7 +449,9 @@ int gk20a_pm_finalize_poweron(struct device *dev)
 			platform->initscale(dev);
 	}

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_finalize_poweron_done(dev_name(dev));
+#endif

 	enable_irq(g->irq_stall);
 	if (g->irq_stall != g->irq_nonstall)
@@ -1006,7 +1012,9 @@ static int gk20a_pm_unrailgate(struct device *dev)
 	g->pstats.railgating_cycle_count++;
 #endif

+#ifdef CONFIG_NVGPU_TRACE
 	trace_gk20a_pm_unrailgate(dev_name(dev));
+#endif

 	nvgpu_mutex_acquire(&platform->railgate_lock);
 	ret = platform->unrailgate(dev);