nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 09:12:24 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: add LTC interrupt register HALs

Browse Source 
Add HALs for reading and writing LTC interrupt configuration registers.

Jira NVGPU-9217

Change-Id: I2d3a913ae5e69009d7888495af9b79acb4960ac9
Signed-off-by: Austin Tajiri <atajiri@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2869901
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Austin Tajiri
2023-03-13 02:31:14 +00:00
committed by mobile promotions
parent b1ac11e0e0
commit db22d49239
5 changed files with 63 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/hal/init/hal_ga100.c
View File

@@ -376,6 +376,12 @@ static const struct gops_ltc_intr ga100_ops_ltc_intr = {
.en_illegal_compstat = gv11b_ltc_intr_en_illegal_compstat,
.handle_illegal_compstat = ga10b_ltc_intr_handle_illegal_compstat,
#endif
.read_intr1 = ga10b_ltc_intr_read_intr1,
.read_intr2 = ga10b_ltc_intr_read_intr2,
.read_intr3 = ga10b_ltc_intr_read_intr3,
.write_intr1 = ga10b_ltc_intr_write_intr1,
.write_intr2 = ga10b_ltc_intr_write_intr2,
.write_intr3 = ga10b_ltc_intr_write_intr3,
};
static const struct gops_ltc ga100_ops_ltc = {