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gpu: nvgpu: reset ltc_ltc0_lts0_intr3 register

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LTC INTR3 register is not reset after handling.
Reset it.

JIRA NVGPU-6982

Change-Id: I6ab9e6de515e3dd2b45240d1a6953ffef171e1c0
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2586573
(cherry picked from commit bc754e5b0494d3ea2da71f186126f19ef5686c08)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623622
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kamble
2021-08-31 18:38:35 +05:30
committed by mobile promotions
parent 64d2e25382
commit e00eabcbd3
1 changed files with 5 additions and 1 deletions
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6
drivers/gpu/nvgpu/hal/ltc/intr/ltc_intr_gv11b_fusa.c
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@@ -1,7 +1,7 @@
/*
* GV11B LTC INTR
*
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2021, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -294,6 +294,10 @@ static void gv11b_ltc_intr_handle_lts_interrupts(struct gk20a *g,
}
nvgpu_log(g, gpu_dbg_intr, "ecc error address: 0x%x", ecc_addr);
nvgpu_writel(g,
nvgpu_safe_add_u32(ltc_ltc0_lts0_intr3_r(), offset),
ltc_intr3);
}
gp10b_ltc_intr_handle_lts_interrupts(g, ltc, slice);