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gpu: nvgpu: fix misra violations in tsg.h

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MISRA C-2012 Rule 10.3

JIRA NVGPU-3900

Change-Id: I5eec50a1aabd4ca766c0f61dbb463c51a30669e6
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2191615
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kadamati
2019-09-06 14:41:33 +05:30
committed by Alex Waterman
parent 252ddc4f05
commit e5efe0c89a
1 changed files with 2 additions and 2 deletions
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4
drivers/gpu/nvgpu/include/nvgpu/tsg.h
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@@ -162,8 +162,8 @@ struct nvgpu_tsg {
* TPC PG is specific to chip.
*/
u32 num_active_tpcs;
/** Set to non-zero if dynamic TPC PG is requested to be enabled. */
u8 tpc_pg_enabled;
/** Set to true if dynamic TPC PG is requested to be enabled. */
bool tpc_pg_enabled;
/**
* Set to true if dynamic TPC PG is enabled and #num_active_tpcs is
* non-zero.