gpu: nvgpu: fix MISRA directive 4.10 in gr falcon

Use correct header files guard for gr_falcon_priv.h

JIRA NVGPU-3226

Change-Id: Ibdea01ba697017b70c23e0245ba7f9dbe33d7dac
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110735
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seshendra Gadagottu
2019-05-02 16:41:46 -07:00
committed by mobile promotions
parent b2c634d1bb
commit e852ea6f2a

View File

@@ -21,7 +21,7 @@
*/
#ifndef GR_FALCON_PRIV_H
#define GR_FALOCN_PRIV_H
#define GR_FALCON_PRIV_H
#include <nvgpu/types.h>
#include <nvgpu/nvgpu_mem.h>
@@ -125,5 +125,5 @@ enum {
#define FALCON_UCODE_SIG_T21X_GPCCS_WITHOUT_RESERVED 0x393161daU
#endif /* GR_FALOCN_PRIV_H */
#endif /* GR_FALCON_PRIV_H */