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gpu: nvgpu: vgpu: properly set dma mask
Properly set the dma_mask and coherent_dma_mask for vgpu instead of using the default 32-bit mask. This fixes the dma_capable check that was previously failing. Bug 2412352 Change-Id: If1d5d74333f86855f8041cc199a04b4b8eb521b5 Signed-off-by: Karl Ding <kding@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1924967 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Aparna Das <aparnad@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Nirav Patel <nipatel@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -16,6 +16,8 @@
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <nvgpu/nvhost.h>
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#include <nvgpu/gk20a.h>
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@@ -100,4 +102,6 @@ struct gk20a_platform gv11b_vgpu_tegra_platform = {
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/* power management callbacks */
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.suspend = vgpu_tegra_suspend,
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.resume = vgpu_tegra_resume,
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.dma_mask = DMA_BIT_MASK(36),
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};
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@@ -453,6 +453,16 @@ int vgpu_probe(struct platform_device *pdev)
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dev->dma_parms = &l->dma_parms;
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dma_set_max_seg_size(dev, UINT_MAX);
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/*
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* A default of 16GB is the largest supported DMA size that is
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* acceptable to all currently supported Tegra SoCs.
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*/
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if (!platform->dma_mask)
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platform->dma_mask = DMA_BIT_MASK(34);
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dma_set_mask(dev, platform->dma_mask);
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dma_set_coherent_mask(dev, platform->dma_mask);
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gk20a->gr_idle_timeout_default = NVGPU_DEFAULT_GR_IDLE_TIMEOUT;
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gk20a->timeouts_disabled_by_user = false;
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nvgpu_atomic_set(&gk20a->timeouts_disabled_refcount, 0);
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