gpu: nvgpu: vgpu: properly set dma mask

Properly set the dma_mask and coherent_dma_mask for vgpu instead of
using the default 32-bit mask. This fixes the dma_capable check that
was previously failing.

Bug 2412352

Change-Id: If1d5d74333f86855f8041cc199a04b4b8eb521b5
Signed-off-by: Karl Ding <kding@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1924967
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Karl Ding
2018-10-11 15:41:59 -07:00
committed by mobile promotions
parent 7e8ca5f5e7
commit ee0a987dfd
2 changed files with 14 additions and 0 deletions

View File

@@ -16,6 +16,8 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <nvgpu/nvhost.h>
#include <nvgpu/gk20a.h>
@@ -100,4 +102,6 @@ struct gk20a_platform gv11b_vgpu_tegra_platform = {
/* power management callbacks */
.suspend = vgpu_tegra_suspend,
.resume = vgpu_tegra_resume,
.dma_mask = DMA_BIT_MASK(36),
};

View File

@@ -453,6 +453,16 @@ int vgpu_probe(struct platform_device *pdev)
dev->dma_parms = &l->dma_parms;
dma_set_max_seg_size(dev, UINT_MAX);
/*
* A default of 16GB is the largest supported DMA size that is
* acceptable to all currently supported Tegra SoCs.
*/
if (!platform->dma_mask)
platform->dma_mask = DMA_BIT_MASK(34);
dma_set_mask(dev, platform->dma_mask);
dma_set_coherent_mask(dev, platform->dma_mask);
gk20a->gr_idle_timeout_default = NVGPU_DEFAULT_GR_IDLE_TIMEOUT;
gk20a->timeouts_disabled_by_user = false;
nvgpu_atomic_set(&gk20a->timeouts_disabled_refcount, 0);