gpu: nvgpu: Add multiple signature parsing support for ACR

- Add multiple signature parsing support for ACR using ucode version
fuse value.
-Signature file contains multiple signatures and need to select
one signature using ucode version to validate the ucode.

Bug 200673810

Change-Id: I39007d4e2e8bb959caf278275d153b633a775def
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455171
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Lakshmanan M <lm@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
mkumbar
2020-12-04 19:54:03 +05:30
committed by Alex Waterman
parent d85588c9a3
commit ee7cdf1fff
4 changed files with 20 additions and 3 deletions

View File

@@ -152,11 +152,13 @@ int nvgpu_acr_init(struct gk20a *g)
#endif
#ifdef CONFIG_NVGPU_DGPU
case NVGPU_GPUID_TU104:
#if defined(CONFIG_NVGPU_NEXT)
case NVGPU_NEXT_DGPU_GPUID:
#endif
nvgpu_tu104_acr_sw_init(g, g->acr);
break;
#if defined(CONFIG_NVGPU_NEXT)
case NVGPU_NEXT_DGPU_GPUID:
nvgpu_next_dgpu_acr_sw_init(g, g->acr);
break;
#endif
#endif
default:
nvgpu_kfree(g, g->acr);

View File

@@ -122,6 +122,9 @@ static void acr_ucode_patch_sig(struct gk20a *g,
unsigned int *p_dbg_sig, unsigned int *p_patch_loc,
unsigned int *p_patch_ind, u32 sig_size)
{
#if defined(CONFIG_NVGPU_NEXT)
struct nvgpu_acr *acr = g->acr;
#endif
unsigned int i, j, *p_sig;
nvgpu_acr_dbg(g, " ");
@@ -133,6 +136,12 @@ static void acr_ucode_patch_sig(struct gk20a *g,
nvgpu_info(g, "DEBUG MODE\n");
}
#if defined(CONFIG_NVGPU_NEXT)
if (acr->get_versioned_sig != NULL) {
p_sig = acr->get_versioned_sig(g, acr, p_sig, &sig_size);
}
#endif
/* Patching logic:*/
sig_size = sig_size / 4U;
for (i = 0U; i < (sizeof(*p_patch_loc)>>2U); i++) {

View File

@@ -116,6 +116,7 @@ struct nvgpu_acr {
struct gk20a *g;
u32 bootstrap_owner;
u32 num_of_sig;
/* LSF properties */
u64 lsf_enable_mask;
@@ -152,6 +153,8 @@ struct nvgpu_acr {
int (*bootstrap_hs_acr)(struct gk20a *g, struct nvgpu_acr *acr);
void (*get_wpr_info)(struct gk20a *g, struct wpr_carveout_info *inf);
u32* (*get_versioned_sig)(struct gk20a *g, struct nvgpu_acr *acr,
u32 *sig, u32 *sig_size);
};
#endif /* ACR_H */

View File

@@ -215,6 +215,9 @@ struct gops_fuse {
*/
int (*read_per_device_identifier)(struct gk20a *g, u64 *pdi);
int (*read_ucode_version)(struct gk20a *g, u32 falcon_id,
u32 *ucode_version);
#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
#include "include/nvgpu/nvgpu_next_gops_fuse.h"
#endif