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gpu: nvgpu: Add multiple signature parsing support for ACR
- Add multiple signature parsing support for ACR using ucode version fuse value. -Signature file contains multiple signatures and need to select one signature using ucode version to validate the ucode. Bug 200673810 Change-Id: I39007d4e2e8bb959caf278275d153b633a775def Signed-off-by: mkumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2455171 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Dinesh T <dt@nvidia.com> Reviewed-by: Lakshmanan M <lm@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -152,11 +152,13 @@ int nvgpu_acr_init(struct gk20a *g)
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#endif
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#ifdef CONFIG_NVGPU_DGPU
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case NVGPU_GPUID_TU104:
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#if defined(CONFIG_NVGPU_NEXT)
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case NVGPU_NEXT_DGPU_GPUID:
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#endif
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nvgpu_tu104_acr_sw_init(g, g->acr);
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break;
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#if defined(CONFIG_NVGPU_NEXT)
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case NVGPU_NEXT_DGPU_GPUID:
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nvgpu_next_dgpu_acr_sw_init(g, g->acr);
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break;
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#endif
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#endif
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default:
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nvgpu_kfree(g, g->acr);
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@@ -122,6 +122,9 @@ static void acr_ucode_patch_sig(struct gk20a *g,
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unsigned int *p_dbg_sig, unsigned int *p_patch_loc,
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unsigned int *p_patch_ind, u32 sig_size)
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{
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#if defined(CONFIG_NVGPU_NEXT)
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struct nvgpu_acr *acr = g->acr;
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#endif
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unsigned int i, j, *p_sig;
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nvgpu_acr_dbg(g, " ");
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@@ -133,6 +136,12 @@ static void acr_ucode_patch_sig(struct gk20a *g,
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nvgpu_info(g, "DEBUG MODE\n");
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}
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#if defined(CONFIG_NVGPU_NEXT)
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if (acr->get_versioned_sig != NULL) {
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p_sig = acr->get_versioned_sig(g, acr, p_sig, &sig_size);
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}
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#endif
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/* Patching logic:*/
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sig_size = sig_size / 4U;
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for (i = 0U; i < (sizeof(*p_patch_loc)>>2U); i++) {
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@@ -116,6 +116,7 @@ struct nvgpu_acr {
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struct gk20a *g;
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u32 bootstrap_owner;
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u32 num_of_sig;
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/* LSF properties */
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u64 lsf_enable_mask;
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@@ -152,6 +153,8 @@ struct nvgpu_acr {
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int (*bootstrap_hs_acr)(struct gk20a *g, struct nvgpu_acr *acr);
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void (*get_wpr_info)(struct gk20a *g, struct wpr_carveout_info *inf);
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u32* (*get_versioned_sig)(struct gk20a *g, struct nvgpu_acr *acr,
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u32 *sig, u32 *sig_size);
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};
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#endif /* ACR_H */
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@@ -215,6 +215,9 @@ struct gops_fuse {
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*/
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int (*read_per_device_identifier)(struct gk20a *g, u64 *pdi);
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int (*read_ucode_version)(struct gk20a *g, u32 falcon_id,
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u32 *ucode_version);
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#if defined(CONFIG_NVGPU_HAL_NON_FUSA) && defined(CONFIG_NVGPU_NEXT)
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#include "include/nvgpu/nvgpu_next_gops_fuse.h"
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#endif
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