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gpu: nvgpu: GA10X_NEXT pulling GR1 out of reset

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This patch is to enable GR1 before resetting GR0
which is not visible to the driver.

Bug 3690950

Change-Id: I8a1907349f5a4354c6b7f95f9904b52738f51f00
Signed-off-by: atanand <atanand@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2758161
(cherry picked from commit 48d925cacf373a97dbdb031a109b83be3bfe2972)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2765635
Reviewed-by: Rajesh Devaraj <rdevaraj@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
atanand
2022-08-09 07:37:24 +00:00
committed by mobile promotions
parent cfc663a65d
commit f43897c940
5 changed files with 30 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/common/grmgr/grmgr.c
View File

@@ -30,6 +30,7 @@
#include <nvgpu/engines.h>
#include <nvgpu/device.h>
#include <nvgpu/fbp.h>
#include <nvgpu/errata.h>
int nvgpu_init_gr_manager(struct gk20a *g)
{
@@ -211,6 +212,15 @@ int nvgpu_init_gr_manager(struct gk20a *g)
*/
if (g->mig.usable_gr_syspipe_instance_id[0U] ==
gr_dev->inst_id) {
/*
* Enable this errata for chip GA10X_NEXT.
*/
if (nvgpu_is_errata_present(g, NVGPU_ERRATA_3690950)) {
if (g->ops.mc.gr1_out_of_reset != NULL) {
g->ops.mc.gr1_out_of_reset(g, gr_dev->type, true);
}
}
continue;
}

4
drivers/gpu/nvgpu/hal/mc/mc_ga10b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -30,6 +30,8 @@
struct gk20a;
int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx,
u32 poll_val);
int ga10b_mc_enable_units(struct gk20a *g, u32 units, bool enable);
int ga10b_mc_enable_dev(struct gk20a *g, const struct nvgpu_device *dev,
bool enable);

4
drivers/gpu/nvgpu/hal/mc/mc_ga10b_fusa.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -69,7 +69,7 @@
* register.
*/
static int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx,
int ga10b_mc_poll_device_enable(struct gk20a *g, u32 reg_idx,
u32 poll_val)
{
u32 reg_val;

2
drivers/gpu/nvgpu/include/nvgpu/errata.h
View File

@@ -35,6 +35,8 @@ struct gk20a;
/** @cond DOXYGEN_SHOULD_SKIP_THIS */
#define ERRATA_FLAGS_NEXT \
/* GA10X_NEXT */ \
DEFINE_ERRATA(NVGPU_ERRATA_3690950, "GA10X_NEXT", "Get GR1 out of reset"),
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
/*

13
drivers/gpu/nvgpu/include/nvgpu/gops/mc.h
View File

@@ -288,6 +288,19 @@ struct gops_mc {
void (*elpg_enable)(struct gk20a *g);
bool (*intr_get_unit_info)(struct gk20a *g, u32 unit);
/**
* @brief To bring dummy GR1 engine out of reset in GA10X_NEXT.
*
* @param g [in] The GPU driver struct.
* @param devtype [in] Type of device.
* @param enable [in] Action to perform.
*
* This function is invoked to disable and enable the GR1 as part of
* SW reset for GA10X_NEXT.
*
*/
void (*gr1_out_of_reset)(struct gk20a *g, u32 devtype, bool enable);
/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
};