gpu: nvgpu: Fix MISRA 15.6 violation

MISRA rule 15.6 makes it mandatory to add braces for
all if-else blocks, including those with single statements.
Correcting one such violation in log.h

Change-Id: I82375d76303a424cf39a2757e3a96bca069039df
Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1965017
Reviewed-by: Mahati Domalapally <mdomalapally@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Srirangan Madhavan
2018-11-26 12:27:14 +05:30
committed by mobile promotions
parent 1c3e533d98
commit f756732979

View File

@@ -170,9 +170,10 @@ extern u64 nvgpu_dbg_mask;
#define gk20a_dbg(log_mask, fmt, arg...) \
do { \
if (((log_mask) & nvgpu_dbg_mask) != 0) \
if (((log_mask) & nvgpu_dbg_mask) != 0) { \
__nvgpu_log_msg(NULL, __func__, __LINE__, \
NVGPU_DEBUG, fmt "\n", ##arg); \
} \
} while (false)
/*