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gpu: nvgpu: fix MISRA rule 8.6 violation

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nvgpu_channel_sync_wait_syncpt is not defined in safety build with the
removal of KMD submit. However, it's declaration was not compiled out.
Fix it.

JIRA NVGPU-3873

Change-Id: Ib2dea5172d53da58c5a16be90bd6f8204bd15572
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2209498
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Sagar Kamble
2019-10-01 20:24:28 +05:30
committed by Alex Waterman
parent 4a5ee02291
commit f9e33430ed
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/nvgpu/include/nvgpu/channel_sync_syncpt.h
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@@ -49,12 +49,14 @@ u32 nvgpu_channel_sync_get_syncpt_id(struct nvgpu_channel_sync_syncpt *s);
*/
u64 nvgpu_channel_sync_get_syncpt_address(struct nvgpu_channel_sync_syncpt *s);
#ifdef CONFIG_NVGPU_KERNEL_MODE_SUBMIT
/*
* Generate a gpu wait cmdbuf from raw fence(can be syncpoints or semaphores).
* Returns a gpu cmdbuf that performs the wait when executed.
*/
int nvgpu_channel_sync_wait_syncpt(struct nvgpu_channel_sync_syncpt *s,
u32 id, u32 thresh, struct priv_cmd_entry *entry);
#endif
/*
* Converts a valid struct nvgpu_channel_sync ptr to