gpu: nvgpu: make gr global_ctx structs private

Add a priv header for common.gr.global_ctx unit's
internal structs. Update users of global_ctx not to refer
to these structs.

JIRA NVGPU-3060

Change-Id: Iffa8d2637f28e395837da4fc4b5b069536e8fc69
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083932
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nitin Kumbhar
2019-03-28 19:36:36 +05:30
committed by mobile promotions
parent f07d933076
commit f9e9d467ec
5 changed files with 63 additions and 31 deletions

View File

@@ -28,6 +28,8 @@
#include <nvgpu/gr/global_ctx.h>
#include "global_ctx_priv.h"
struct nvgpu_gr_global_ctx_buffer_desc *
nvgpu_gr_global_ctx_desc_alloc(struct gk20a *g)
{
@@ -56,11 +58,9 @@ size_t nvgpu_gr_global_ctx_get_size(struct nvgpu_gr_global_ctx_buffer_desc *desc
}
static void nvgpu_gr_global_ctx_buffer_destroy(struct gk20a *g,
struct nvgpu_gr_global_ctx_buffer_desc *desc,
enum nvgpu_gr_global_ctx_index index)
struct nvgpu_mem *mem)
{
nvgpu_dma_free(g, &desc[index].mem);
desc[index].destroy = NULL;
nvgpu_dma_free(g, mem);
}
void nvgpu_gr_global_ctx_buffer_free(struct gk20a *g,
@@ -70,7 +70,8 @@ void nvgpu_gr_global_ctx_buffer_free(struct gk20a *g,
for (i = 0U; i < NVGPU_GR_GLOBAL_CTX_COUNT; i++) {
if (desc[i].destroy != NULL) {
desc[i].destroy(g, desc, i);
desc[i].destroy(g, &desc[i].mem);
desc[i].destroy = NULL;
}
}
@@ -113,8 +114,9 @@ static int nvgpu_gr_global_ctx_buffer_alloc_vpr(struct gk20a *g,
}
if (g->ops.secure_alloc != NULL) {
err = g->ops.secure_alloc(g, &desc[index],
desc[index].size);
err = g->ops.secure_alloc(g,
&desc[index].mem, desc[index].size,
&desc[index].destroy);
if (err != 0) {
return err;
}

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@@ -0,0 +1,37 @@
/*
* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GR_GLOBAL_CTX_PRIV_H
#define NVGPU_GR_GLOBAL_CTX_PRIV_H
struct nvgpu_gr_global_ctx_buffer_desc {
struct nvgpu_mem mem;
size_t size;
global_ctx_mem_destroy_fn destroy;
};
struct nvgpu_gr_global_ctx_local_golden_image {
u32 *context;
size_t size;
};
#endif /* NVGPU_GR_GLOBAL_CTX_PRIV_H */

View File

@@ -75,6 +75,9 @@ struct nvgpu_pbdma_status_info;
struct nvgpu_gr_config;
enum nvgpu_nvlink_minion_dlcmd;
struct nvgpu_cbc;
struct nvgpu_mem;
typedef void (*global_ctx_mem_destroy_fn)(struct gk20a *g,
struct nvgpu_mem *mem);
#include <nvgpu/lock.h>
#include <nvgpu/thread.h>
@@ -1309,9 +1312,8 @@ struct gpu_ops {
* context buffer descriptor (especially fields destroy, sgt,
* size).
*/
int (*secure_alloc)(struct gk20a *g,
struct nvgpu_gr_global_ctx_buffer_desc *desc,
size_t size);
int (*secure_alloc)(struct gk20a *g, struct nvgpu_mem *desc_mem,
size_t size, global_ctx_mem_destroy_fn *destroy);
struct {
void (*exit)(struct gk20a *g, struct nvgpu_mem *mem,
struct nvgpu_sgl *sgl);

View File

@@ -27,6 +27,11 @@
struct gk20a;
struct nvgpu_mem;
struct vm_gk20a;
struct nvgpu_gr_global_ctx_buffer_desc;
struct nvgpu_gr_global_ctx_local_golden_image;
typedef void (*global_ctx_mem_destroy_fn)(struct gk20a *g,
struct nvgpu_mem *mem);
enum nvgpu_gr_global_ctx_index {
NVGPU_GR_GLOBAL_CTX_CIRCULAR = 0,
@@ -41,20 +46,6 @@ enum nvgpu_gr_global_ctx_index {
NVGPU_GR_GLOBAL_CTX_COUNT = 9
};
struct nvgpu_gr_global_ctx_buffer_desc {
struct nvgpu_mem mem;
size_t size;
void (*destroy)(struct gk20a *g,
struct nvgpu_gr_global_ctx_buffer_desc *desc,
enum nvgpu_gr_global_ctx_index index);
};
struct nvgpu_gr_global_ctx_local_golden_image {
u32 *context;
size_t size;
};
struct nvgpu_gr_global_ctx_buffer_desc *nvgpu_gr_global_ctx_desc_alloc(
struct gk20a *g);
void nvgpu_gr_global_ctx_desc_free(struct gk20a *g,

View File

@@ -99,8 +99,8 @@ static void gk20a_tegra_secure_page_destroy(struct gk20a *g,
}
static int gk20a_tegra_secure_alloc(struct gk20a *g,
struct nvgpu_gr_global_ctx_buffer_desc *desc,
size_t size)
struct nvgpu_mem *desc_mem, size_t size,
global_ctx_mem_destroy_fn *destroy)
{
struct device *dev = dev_from_gk20a(g);
struct gk20a_platform *platform = dev_get_drvdata(dev);
@@ -111,7 +111,7 @@ static int gk20a_tegra_secure_alloc(struct gk20a *g,
int err = 0;
size_t aligned_size = PAGE_ALIGN(size);
if (nvgpu_mem_is_valid(&desc->mem))
if (nvgpu_mem_is_valid(desc_mem))
return 0;
/* We ran out of preallocated memory */
@@ -138,11 +138,11 @@ static int gk20a_tegra_secure_alloc(struct gk20a *g,
/* This bypasses SMMU for VPR during gmmu_map. */
sg_dma_address(sgt->sgl) = 0;
desc->destroy = NULL;
*destroy = NULL;
desc->mem.priv.sgt = sgt;
desc->mem.size = size;
desc->mem.aperture = APERTURE_SYSMEM;
desc_mem->priv.sgt = sgt;
desc_mem->size = size;
desc_mem->aperture = APERTURE_SYSMEM;
secure_buffer->used += aligned_size;