Commit Graph

16 Commits

Author SHA1 Message Date
tkudav
26406a070d gpu: nvgpu: Hardcode nvlink speed to 20G
Xavier Chip Product POR was updated to 20G only. No more qual work 
happening for 16G. So we do not plan to support 16G. Now that we have
a single speed left, remove the code added to support nvlink speed from
VBIOS as it is redundant.

JIRA NVGPU-2964

Change-Id: Icd71ebb8271240818e36d40bf73c60f0c5beb6bf
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284175
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2020-12-15 14:13:28 -06:00
ajesh
b095d73022 gpu: nvgpu: modify the ffs and fls interface
Modify the ffs/fls interface function names to nvgpu_ffs and
nvgpu_fls.  The return bit values are numbered from 1 to 64.
A return value of 0 indicates an input of 0 value.

Jira NVGPU-3601

Change-Id: I1c151eeac1f94fe3b5b85bd5daf0488f75c5efa0
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2146119
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-07-11 05:43:55 -07:00
Sagar Kamble
3f08cf8a48 gpu: nvgpu: rename feature Make and C flags
Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>

s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG

JIRA NVGPU-3624

Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2130290
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-06-11 09:46:24 -07:00
Tejal Kudav
6a315a5a6d gpu: nvgpu: Add nvlink link_mode_transition unit
Move code used for transitioning between link and sublink modes
into a separate unit called 'link_mode_transition' under subelement
'nvlink'.
Also aggregate all the link/sublink mode related ops under
g->ops.nvlink.link_mode_transitions.

JIRA NVGPU-2862

Change-Id: I289faa10fd1c83b6b8d028b44fe244531ca42b15
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2035794
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-03-18 15:45:31 -07:00
Tejal Kudav
a6f0ce7971 gpu: nvgpu: Add nvlink "minion" unit
Move the code involved in dealing with minion into a separate unit
called "nvlink_minion". This unit includes minion HW access, ucode
handling, exposing state of minion and also dealing with minion
interrupts. The interfaces to this unit are partially exposed using
g->ops.nvlink.minion ops and rest are part of nvlink_minion.h public
header.

JIRA NVGPU-2860

Change-Id: Iea9288ea5f0b26688540b1eb8ab64afd756941a4
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2030103
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-03-12 11:44:59 -07:00
Tejal Kudav
56f9753188 gpu: nvgpu: Fix MISRA 14.4 violations in nvlink
MISRA rule 14.4 allows only boolean type to be used as controlling
expression in "if" and iteration statement. Replace all non-boolean
expressions with boolean ones in "if" and "while" statements in
nvlink code.

JIRA NVGPU-1921

Change-Id: I8e8b96283c1cadf2c64fc7b8168cf44a6ceb8be5
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2029073
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-02-28 00:34:20 -08:00
Tejal Kudav
6dbfd06fd4 gpu: nvgpu: Fix MISRA 10.4 violations in nvlink
MISRA Rule 10.4 requires operands of arithmetic operation to have
same essential type category. Fix such 10.4 violations in nvlink code
by adding "U" at the end of the integer literals. In some cases where
possible, replace the magic constants with functions returning
register constants.

JIRA NVGPU-1921

Change-Id: I070b6bcf879a4b18a0599ccda16834f7fdbd8d53
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2022990
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-02-21 21:56:39 -08:00
Tejal Kudav
e7987729bd gpu: nvgpu: Fix 10.3 MISRA violations in nvlink
MISRA Rule 10.3 does not allow value of expression to be assigned to
an object with a narrower essential type or to a different essential
type category.
Fix such 10.3 violations in nvlink code by type-casting (when sure
there will be no overflows) or by changing the data-type of variables

JIRA NVGPU-1921

Change-Id: Iab103a7f0c23cf2a047152cbd76c0b55b3cc947c
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012811
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-19 21:24:55 -08:00
Tejal Kudav
558af783ef gpu: nvgpu: Fix 10.1 MISRA issues in common/nvlink
Fix the MISRA 10.1 violations by not allowing non-boolean type variables
to be used as boolean.

JIRA NVGPU-1921

Change-Id: Iccfc1794575530500da652a7f9db9f27c4187231
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011066
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-18 03:16:11 -08:00
Tejal Kudav
d36cf64088 gpu: nvgpu: Fix 15.6 MISRA issues in nvlink common
MISRA Rule-15.6 requires that if-else and loop blocks be enclosed in
braces. Fix 15.6 violations in nvlink common code by adding
braces.

JIRA NVGPU-1921

Change-Id: I77325f1138c4359fbfc1ff9199441d9c40d13128
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2008408
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Raghuram Kothakota <rkothakota@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-01 11:59:33 -08:00
Tejal Kudav
a28c753ee6 gpu: nvgpu: Add nvlink "device_reginit" unit
Move the code involved in nvlink register initialization into a
separate unit called "nvlink_device_reginit".

Nvlink device_reginit will be an unit under component nvlink_init.
TLC buffer credit initialization is done by this unit.

JIRA NVGPU-1784

Change-Id: I9dd4238d0288b33867eb8a8993e56287a67a907f
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1994665
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-29 21:54:52 -08:00
Tejal Kudav
15115e7db9 gpu: nvgpu: Add nvlink.c to POSIX build
1. The nvlink code in common/ is clean from any external API usage.
   There should not be any compilation issues with POSIX build if we
   include nvlink.c to it.
2. Rename the nvlink file in POSIX build to avoid the tmake
   duplicate filename issue.
3. Set CONFIG_TEGRA_NVLINK for POSIX to enable reporting of MISRA
   violations in nvlink code by the MISRA scanner.
4. To fix the build issues:
     a. Add stubs in POSIX
     b. Return the 'err' variable set during dev_shutdown() as 'err'
        is set but not used.

JIRA NVGPU-1921
JIRA NVGPU-1319

Change-Id: Ifdd6574d772167856782bafa74994507b3cedf4c
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2005622
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-01-29 10:54:44 -08:00
Tejal Kudav
d8a9b899f4 gpu: nvgpu: Add nvlink_probe unit
Move the code involved in nvlink probe sequence into a separate
unit called "nvlink_probe"
nvlink probe code is spread over both the common and OS specific
nvlink files.

Nvlink Probe unit would encompass code needed to initialize the
nvlink software state. Nvlink software initialization involves:
1. Allocate memory for nvlink_device and nvlink_link structs
2. Read the device tree pci node to know about nvlink topology
3. Initialize nvlink function pointers needed by Tegra nvlink
   core-driver
4. Register nvlink_device and nvlink_link with the core-driver.

nvlink probe returns -ENODEV when nvlink is not supported.
Nvlink is not supported in two cases:
1. There is no nvlink IP on the Tegra SoC which is denoted by
   CONFIG_TEGRA_NVLINK or
2. The pci device tree node does not have "nvidia,nvlink" child
   node needed to describe nvlink topology.

Any negative return value other than -ENODEV denotes failure in
execution of nvlink probe.

JIRA NVGPU-1783

Change-Id: I50011b25d88d8cc01569caac7895abe32ee38215
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1994619
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-28 00:05:46 -08:00
Tejal Kudav
b83c5e4594 gpu: nvgpu: Remove external APIs in nvlink common
The Tegra SOC nvlink driver and dGPU nvlink driver depend on
struct definitions, macros and functions exposed by nvlink-core
driver. The nvlink-core driver is not part of the nvgpu driver,
hence we should not be directly accessing any core driver
APIs/macros/structs from the /common/nvlink code. Common code can
only use nvgpu internal APIs. We wrap all calls from common/nvlink.c
to other drivers in nvgpu wrappers, and define the implementation of
wrappers in os/linux and os/nvgpu_rmos, and stub them in os/posix.

Also, we remove the implicit inclusion of OS specific nvlink header
file via common nvgpu/nvlink.h. So the OS specific code needs to
explicitly add OS specific header file.

JIRA NVGPU-966

Change-Id: I65c67e247ee74088bb1253f6ae4c8d0c49420a98
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1990071
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-01-18 02:13:43 -08:00
Alex Waterman
489236d181 gpu: nvgpu: MISRA 21.2 fixes: __nvgpu_set_enabled()
Rename __nvgpu_set_enabled() to nvgpu_set_enabled(). The original
double underscore was present to indicate that this function is a
function with potentially unintended side effects (enabling a feature
has wide ranging impact).

To not lose this documentation a comment was added to convey that this
function must be used with care.

JIRA NVGPU-1029

Change-Id: I8bfc6fa4c17743f9f8056cb6a7a0f66229ca2583
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1989434
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2019-01-15 12:54:19 -08:00
Tejal Kudav
a307b6eb77 gpu: nvgpu: Move nvlink HAL files to common/nvlink
Move the nvlink HAL code to unit specific directory as part
of nvgpu restructing.
This move is done after removing usage of other unit's hardware
headers from nvlink. Also confirmed that no other unit files are
including nvlink hardware headers.

JIRA NVGPU-966

Change-Id: I301e3f8de37c5792a3e1e799b97e5fdfc131f058
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1975259
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-12-21 13:24:19 -08:00