Nvgpu uses RPC to get target voltage for a freq, though this gets
the latest Voltage, there could be mismatch b/w data in nvgpu & PMU.
To make it consistent, use the local VF table for getting the voltage.
Also the slave ratio calculation is inaccurate due to quantization.
So instead of calculating, use the slave ratio from parsed vbios table.
Bug 200545403
Change-Id: Ibb064f2a0f5eba77166e2b3f9868da9e3fcc7193
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2183546
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Some functions are not accessing hardware directly
but are being called using HAL ops: For example
.init = gv100_bios_init,
.preos_wait_for_halt = gv100_bios_preos_wait_for_halt,
.preos_reload_check = gv100_bios_preos_reload_check,
.devinit = gp106_bios_devinit,
.preos = gp106_bios_preos,
.verify_devinit = NULL,
This was being called as:
g->ops.bios.init(g)
g->ops.bios.preos_wait_for_halt(g)
g->ops.bios.preos_reload_check(g)
g->ops.bios.preos(g)
g->ops.bios.devinit(g)
g->ops.bios.verify_devinit(g)
Change the function access by using sw ops, like:
Create new function: nvgpu_bios_sw_init()
and based on hardware chip call the chip specific
bios sw init function: nvgpu_gv100_bios_sw_init()
and nvgpu_tu104_bios_sw_init()to assign the sw
ops
JIRA NVGPU-2071
Change-Id: Ibfcd9b225a7bc184737abdd94c2e54190fcd90a0
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108526
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Identifier names used were already used to represent types. Fix those.
for e.g. pwr_channel in nv_pmu_pmgr_pwr_channel_union.
pmu_init_msg identifier name changed to init_msg as that is used to
represent a type.
JIRA NVGPU-3272
Change-Id: I887b66f08df1e00803d872873f6447f563675d44
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108548
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
MISRA Rule-17.7 requires the return value of all functions to be
used. Fix is either to use the return value or change the function
to return void. This patch contains fixes for all 17.7 violations
in the nvgpu.common.pmu.clk.* units.
JIRA NVGPU-3035
Change-Id: I13863f43c6bea76917978a12df091a672a3e5098
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108887
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This patch does the following for boardobjgrpmask unit.
1. Remove unused functions and its pointers.
2. Append public functions with nvgpu.
3. Remove unnecessary inclusion of header files.
4. Make local functions as static.
5. Rename function names to increase readibility.
6. Remove boardobj* from static functions.
Jira NVGPU-1977
Change-Id: Ie6d3bd8f55784d29ae4ba720fb3998487ad2b942
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107167
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Moved nvgpu_clk_pmupstate structure from gk20a to
nvgpu_pmu.The aim is to have single pmu structure inside
gk20a, that is "nvgpu_pmu" struct and all the global
structures of all units in PMU should be included in
"nvgpu_pmu" struct.
NVGPU-3220
Change-Id: I531aab568a692c55e640ca2c33aa7508b83a9593
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2104129
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Description:
nvgpu_clk_pmupstate is the global structure in clk units. It is declared
in clk.h and all clk units will include clk.h header.
nvgpu_clk_pmupstate struct will have structure pointers to all clk units
and will include genereic function pointers which are used by most clk
units. The reason why the function pointers is defined in this sturct,
and not included inside g->ops is because, these are only clk specific
functions and rest of the driver code is not dependent on this.
Each unit will have init function to allocate memory for its structure
and will initialize its local functions.
Changes:
1) Introduced nvgpu_clk_pmupstate in clk.h file. All the changes needed
to call the above struct from individual clk units.
2) Removed cyclic dependency headers in clk units by calling function
through pointers defined in clk.h.
3) Initialization of each unit is done in respective unit instead of
doing it in clk unit. Added *_init_pmupstate and *_free_pmupstate to
individual clk units.
4) Each unit clean up will be done separately while refactoring that
unit.
NVGPU-1963
NVGPU-2965
Change-Id: Iee79d7a812b62407252636057b104f952c94a229
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2033537
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This patch does the following.
1. Append public functions with nvgpu.
2. Move public functions & structure to include/pmu/clk.
3. Remove inclusion of HW header files in common.
4. Move FREQ_STEP_SIZE_MHZ to clk_prog.h as it is used there.
5. Fix 16.3 and 11.3 Misra Violations.
Jira NVGPU-1965
Change-Id: I268d257d6de9c986e456a666cf6d633fe10fc440
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2024992
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Changes:
1) Separated clk.h which is in /nvgpu/include/pmu
into different units
2) Renamed global functions
Intention: At present /nvgpu/include/pmu/clk.h
consists of structures and functions of different
clock units. It is difficult to work on individual
clk units if this file is not separated into
individual units. All stucts and functions in clk.h
are seperated into different clk units.
Individual private clk units were not touched.
Post this patch, the sebsequent patches would make
changes in the individual clk units.
NVGPU-2707
Change-Id: I7bf9fab38a73bceb451291530a67c70ed343b0cb
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2021704
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
All slave clock should be quantized as per step size.
TU104 has 15Mhz as step size.
Enable clk_arb without enabling clk_freq_controller.
clk_freq_controller is not needed for Auto use case.
Increase the maxclk only when master is less that slave clock.
This is needed when gpcclk is less than slave P0 min.
Use get_status to get Vim and use it for change sequencer.
Add support for Device Events
Bug 200454682
Bug 2481917
Change-Id: Ie0c404f4b77e41f6a1719b52d6e29a5ac757b41b
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1994831
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
