Commit Graph

16 Commits

Author SHA1 Message Date
Martin Radev
6249220e09 gpu: nvgpu: fix nvgpu_css_allocate_perfmon_ids
This patch fixes nvgpu_css_allocate_perfmon_ids which
leads to a buffer overflow if the allocation of perfmon
ids does not succeed.

If the allocation of perfmon ids cannot be satisfied,
bitmap_find... would return CSS_MAX_PERFMON_IDS and
nvgpu_bitmap_set would still be called with start after
the bitmap array. This results into a buffer overflow.

Bug 3814963

Change-Id: I4caff36cf0c920b4445e1841d16ba2b4c3d19aaa
Signed-off-by: Martin Radev <mradev@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2786747
Reviewed-by: svcacv <svcacv@nvidia.com>
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Reviewed-by: Prateek Sethi <prsethi@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-10-05 20:13:27 -07:00
Richard Zhao
9ab1271269 gpu: nvgpu: common: fix compile error of new compile flags
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia8f508c65071aa4775d71b8ee5dbf88a33b5cbd5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555056
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2022-01-13 12:36:14 -08:00
Deepak Nibade
f34711d3de gpu: nvgpu: split perfbuf initialization
gk20a_perfbuf_map() allocates perfbuf VM, maps the user buffer into new
VM, and then triggers gops.perfbuf.perfbuf_enable(). This HAL then does
following :
- Allocate perfbuf instance block
- Initialize perfbuf instance block
- Reset stream buffer
- Program instance block address in PMA registers
- Program user buffer address into PMA registers

New profiler interface will have it's own API to setup PMA strem, and
it requires above setup to be done in two phases of perfbuf
initialization and then user buffer setup.

Split above functionalities into below functions
- nvgpu_perfbuf_init_vm()
  - Allocate perfbuf VM
  - Call gops.perfbuf.init_inst_block() to initialize perfbuf instance
    block

- gops.perfbuf.init_inst_block()
  - Allocate perfbuf instance block
  - Initialize perfbuf instance block
  - Program instance block address in PMA registers using
    gops.perf.init_inst_block()
  - In case of vGPU, trigger TEGRA_VGPU_CMD_PERFBUF_INST_BLOCK_MGT
    command to gpu server

- gops.perf.init_inst_block()
  - Reset stream buffer
  - Program user buffer address into PMA registers

Also add corresponding cleanup functions as below :
gops.perf.deinit_inst_block()
gops.perfbuf.deinit_inst_block()
nvgpu_perfbuf_deinit_vm()

Bug 2510974
Jira NVGPU-5360

Change-Id: I486370f21012cbb7fea84fe46fb16db95bc16790
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2372984
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2020-12-15 14:13:28 -06:00
Philip Elcan
06fd513e1e gpu: nvgpu: move common.unit into common.mc
nvgpu.common.unit was just an enum used for passing to nvgpu.common.mc
APIs. So, move the enum into mc.h, and replace the include of unit.h
with mc.h where appropriate. And update the yaml arch.

JIRA NVGPU-4144

Change-Id: I210ea4d3b49cd494e43add1b52f3fbcdb020a1e3
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2216106
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2020-12-15 14:10:29 -06:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-05-06 02:56:53 -07:00
Deepak Nibade
c474f7c288 gpu: nvgpu: add CSS hal to get max buffer size
Currently max_css_buffer_size is incorrectly stored in struct nvgpu_gr

Add a new hal g->ops.css.get_max_buffer_size() to get the size and
remove the variable from struct nvgpu_gr

Jira NVGPU-3125

Change-Id: If78fd86559526b84031051e281a98327a46fc11d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2105652
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2019-04-26 09:37:12 -07:00
Deepak Nibade
1533951567 gpu: nvgpu: move cyclestats_snapshot data to struct gk20a
cyclestats_snapshot data and lock is right now stored in struct nvgpu_gr
Use case itself is not specific to GR engine but in general it applies
to other units outside of GR too.

Hence it makes sense to move both data and lock to struct gk20a instead
of keeping them in struct nvgpu_gr

Update all cyclestats_snapshot code to refer data/lock from struct gk20a
Remove gr_priv.h header include from cyclestats_snapshot.c

Some of the functions were mistakenly declared in gr_gk20a.h.
Move them to cyclestats_snapshot.h and rename them to form nvgpu_css_*()

Jira NVGPU-1103

Change-Id: I3fb32fe96f0ca6613f4640c8bd227b9e0e02dca3
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2104848
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2019-04-25 07:57:34 -07:00
Vinod G
dc82262b99 gpu: nvgpu: Add gr_priv header file
Move nvgpu_gr structure to private file gr_priv.h
Include the private file where gr variables are used.

JIRA NVGPU-3132
JIRA NVGPU-3079

Change-Id: Ib26ca5c5cb25fd8dd013a7c643278efc34aa55d4
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2098021
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2019-04-22 03:15:09 -07:00
Vinod G
556e139077 gpu: nvgpu: Cleanup for gr_gk20a header
Removed unused struct from gr_gk20a.h
Change static allocation for struct gr_gk20a to dynamic type.
Change all the files that being affected by that change.

Call gr allocation from corresponding init_support functions, which
are part of the probe functions.
nvgpu_pci_init_support in pci.c
vgpu_init_support in vgpu_linux.c
gk20a_init_support in module.c

Call gr free before the gk20a free call in nvgpu_free_gk20a.

Rename struct gr_gk20a to struct nvgpu_gr

JIRA NVGPU-3132

Change-Id: Ief5e664521f141c7378c4044ed0df5f03ba06fca
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2095798
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
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2019-04-19 00:04:00 -07:00
Philip Elcan
8efcf68017 gpu: nvgpu: perf: fix MISRA 10.3 violations
MISRA Rule 10.3 prohibits assignment of objects of different essential
or narrower type. This fixes a number of MISRA 10.3 violations in
the common/perf unit.

JIRA: NVGPU-3023

Change-Id: I7edc51c62649b8e642c22ee911bc57d67b388000
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084044
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Reviewed-by: Adeel Raza <araza@nvidia.com>
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2019-04-01 15:54:17 -07:00
Philip Elcan
257115e06c gpu: nvgpu: add nvgpu_bitmap_set and nvgpu_bitmap_clear
Introduce nvgpu_bitmap_set() and nvgpu_bitmap_clear() APIs to wrap the
bitmap_set() and bitmap_clear() APIs, respectively. The new nvgpu_*
versions accept unsigned length parameters since length is logically an
unsigned value where bitmap_set and bitmap_clear accept signed values.
We inherit bitmap_set and bitmap_clear from the OS, so we can't
directly change those.

Also, change uses of the old APIs to the new ones.

These changes resolve MISRA Rule 10.3 violations for implicit assignment
of objects of different essential or narrower type.

JIRA NVGPU-2953

Change-Id: I2c8f790049232a791f248b350c485bb07452315b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2077624
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Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
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Reviewed-by: Adeel Raza <araza@nvidia.com>
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2019-03-25 13:35:24 -07:00
Adeel Raza
d828e013db gpu: nvgpu: common: MISRA rule 15.6 fixes
MISRA rule 15.6 requires that all if/else/loop blocks should be enclosed
by brackets. This patch adds brackets to single line if/else/loop blocks
in the common directory.

JIRA NVGPU-775

Change-Id: I0dfb38dbf256d49bc0391d889d9fbe5e21da5641
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011655
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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2019-02-05 19:23:47 -08:00
Nicolas Benech
cb2a05dd92 gpu: nvgpu: Fix LibC MISRA 17.7 in common
MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fix for all 17.7 violations instandard C functions
in common code.

JIRA NVGPU-1036

Change-Id: Id6dea92df371e71b22b54cd7a521fc22812f9b69
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1929899
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2018-11-01 17:15:37 -07:00
Debarshi Dutta
6c8be7cfe2 gpu: nvgpu: move header location of gk20a.h
Change path corresponding to gk20a.h to <nvgpu/gk20a.h> corresponding
to files in the following directories.

gk20a/
vgpu/
gv100/
tu104/
common/bus/
common/fb/
common/ltc/
common/mc/
common/perf/

Jira NVGPU-597

Change-Id: I7b4f5e5ea3d13a4d1810c5db35fbc26fe5da443e
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1846826
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2018-10-24 23:16:10 -07:00
Amurthyreddy
c114b9e77e gpu: nvgpu: MISRA 14.4 err/ret/status as boolean
MISRA rule 14.4 doesn't allow the usage of integer types as booleans
in the controlling expression of an if statement or an iteration
statement

Fix violations where the integer variables err, ret, status are used
as booleans in the controlling expression of if and loop statements.

JIRA NVGPU-1019

Change-Id: Ia950828797b8eff4bc754269ea2d9fa272f59436
Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1919111
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
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2018-10-12 17:35:11 +05:30
Deepak Nibade
92c1949392 gpu: nvgpu: add separate unit for cyclestats_snapshot
Add new separate unit common/perf/cyclestats_snapshot.c and add
corresponding header file include/nvgpu/cyclestats_snapshot.h

This unit is h/w independent and simply calls gops.perf.* HALs
exposed by perf unit to do the h/w configurations

Also remove gv11b/css_gr_gv11b.* files as h/w specific sequence
implemented in them is already moved to perf unit

Rename all cyclestats_snapshot HALs in the form nvgpu_css_*()

Jira NVGPU-1103

Change-Id: I303f6becb313ac918e06c495a5fe299947a1f0b1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1916652
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2018-10-12 17:35:11 +05:30