Commit Graph

8 Commits

Author SHA1 Message Date
Divya Singhatwaria
20fcf813dd gpu: nvgpu: Use sw ops for BIOS
Some functions are not accessing hardware directly
but are being called using HAL ops: For example

.init = gv100_bios_init,
.preos_wait_for_halt = gv100_bios_preos_wait_for_halt,
.preos_reload_check = gv100_bios_preos_reload_check,
.devinit = gp106_bios_devinit,
.preos = gp106_bios_preos,
.verify_devinit = NULL,

This was being called as:
g->ops.bios.init(g)
g->ops.bios.preos_wait_for_halt(g)
g->ops.bios.preos_reload_check(g)
g->ops.bios.preos(g)
g->ops.bios.devinit(g)
g->ops.bios.verify_devinit(g)

Change the function access by using sw ops, like:
Create new function: nvgpu_bios_sw_init()
and based on hardware chip call the chip specific
bios sw init function: nvgpu_gv100_bios_sw_init()
and nvgpu_tu104_bios_sw_init()to assign the sw
ops

JIRA NVGPU-2071

Change-Id: Ibfcd9b225a7bc184737abdd94c2e54190fcd90a0
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108526
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-28 02:05:43 -07:00
Vedashree Vidwans
c90fcbae2a gpu: nvgpu: fix MISRA Rule 2.2 no dead code
MISRA rule 2.2 defines dead code as "operations which are executed but
removal of these operations has no effect on program behavior".
Variable initializations violate this rule if initialized value is not
used and replaced.

This patch fixes some of these reported violations.

Jira NVGPU-858

Change-Id: I694517ace8884c78c63f6346e455078d19b70b4d
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110459
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-02 15:56:56 -07:00
Sagar Kamble
1262df6d70 gpu: nvgpu: fix misra rule 5.7 violations in pmuif headers
Identifier names used were already used to represent types. Fix those.
for e.g. pwr_channel in nv_pmu_pmgr_pwr_channel_union.
pmu_init_msg identifier name changed to init_msg as that is used to
represent a type.

JIRA NVGPU-3272

Change-Id: I887b66f08df1e00803d872873f6447f563675d44
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108548
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-05-02 04:18:49 -07:00
Divya Singhatwaria
b368dc48b3 gpu: nvgpu: Re-factor BIOS unit
- Create nvlink_bios.c/.h files to separate out nvlink
  related bios code.
- Create bios_sw_<chip speciific>.c/.h files to separate
  out chips specific bios code.
- Create hal files for bios under hal/bios/ and move
  hardware specific code there.
- Move hardware accessing hal files from common/top
  to hal/top

JIRA NVGPU-2071

Change-Id: Ia466f1cd8947540b07b237e891312123df2c6b46
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107371
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-30 02:47:37 -07:00
Abdul Salam
bc10ef568e gpu: nvgpu: Restructure boardobjgrpmask unit
This patch does the following for boardobjgrpmask unit.
1. Remove unused functions and its pointers.
2. Append public functions with nvgpu.
3. Remove unnecessary inclusion of header files.
4. Make local functions as static.
5. Rename function names to increase readibility.
6. Remove boardobj* from static functions.

Jira NVGPU-1977

Change-Id: Ie6d3bd8f55784d29ae4ba720fb3998487ad2b942
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107167
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-04-29 11:04:46 -07:00
Philip Elcan
011b42e05f gpu: nvgpu: pmgr: fix MISRA 10.3 violations
Fix MISRA Rule 10.3 violations in common/pmu/pmgr for assigning objects
of different size or essential type.

JIRA NVGPU-1008

Change-Id: Icc6b6757d4231cbad842580b28f5fd86fdb1f79b
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027655
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-03-07 11:44:05 -08:00
Philip Elcan
699c2a15fa gpu: nvgpu: pmgr: update type for size param
Update interfaces to use size_t to align with boardobj_construct_super()
and avoid unnecessary casts.

JIRA NVGPU-1008

Change-Id: I7bff681f04f43e2f599d6f47138b04b2a94bfff3
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011436
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-02-11 14:04:32 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-10 20:09:55 -08:00