Add a couple of trace points for tracking when we need to wait for
space in the gpfifo ring buffer. This wait can introduce significant
latencies to rendering with large gpfifo entry inputs so it's good to
be able to measure how often this path is taken.
Bug 1592391
Bug 1550886
Change-Id: I7f362e9c307eeffeeecaaba268ef2e3613e54597
Signed-off-by: Janne Hellsten <jhellsten@nvidia.com>
Reviewed-on: http://git-master/r/674021
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Fix panics when using regops when PMU is disabled, or when whitelists
have not been defined.
Bug 1592505
Change-Id: I316c98147c54be7b1114ad23049ce3a634d4805e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/671841
Make gr_gm20b_alloc_gr_ctx static. It is used only in the same file.
Bug 200067946
Change-Id: I484ff84ebe9a356f251db5a14ca0e60db64578bf
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/673267
Implement several fixes for allowing the GVA address space to grow
to larger than 32GB and increase the address space to 128GB.
o Implement dynamic allocation of PDE backing pages. The memory
to store the PDE entries was hard coded to 1 page. Now the
number of pages necessary is computed dynamically based on the
size of the address space and the size of large pages.
o Fix an arithmetic problem in the gm20b sparse texture code
that caused large address spaces to be truncated when sparse
PDEs/PTEs were being filled in. This caused a kernel panic
when freeing the address space since a lot of the backing
PTE memory was not allocated.
o Change the address space split for large and small pages. Small
pages now occupy the bottom 16GB of the address space. Large
pages are used for the rest of the address space. Now, with a
128GB address space, there are 112GB of large page GVA available.
This patch exists to allow large (16GB) sparse textures to be allocated
without running into lack of memory issues and kernel panics.
Bug 1574267
Change-Id: I7c59ee54bd573dfc53b58c346156df37a85dfc22
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/671204
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
enables non-blocking interrupts in ce2 all other
ce2 interrupts are cleared and not handled.
bug 200036089
Change-Id: I9f47b06c677c72ac523019e6a3f70fedd07830a2
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/671783
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Free also newly allocated struct file in error conditions with fput, and
pair it by not trying to release the resulting null as_share on release.
Bug 1597056
Change-Id: Ifad5c3a829b2c459ed6a738ecdc1ac2ac7e1678a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/671527
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
CTA preemption needs to be enabled by setting a value in context. Set
it for gm20b.
Bug 200063473
Bug 1517461
Change-Id: I080cd71b348d08f834fd23ebbe7443dba79224db
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/661299
The default zbc entries were never populated in zbc HW table
because the conditional flag "gr->sw_ready" was always set thus
avoided the zbc default loading function call. Now zbc default
loading would happen only during boot time in sw structure.Hw
zbc regs would be loaded from that structure every time a
railgate exit happens.
Bug 1580210
Change-Id: Ie3e40738cbc84cf724c3f3871f15b17a5c84025a
Signed-off-by: Sujeet Baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/662306
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Tested-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
if a request is submitted larger than the
allocated fifo, an error is returned immediately
rather than waiting for timeout while enough space
becomes available in the fifo (timeout
will not trigger in this case)
bug 1563401
Change-Id: I264dee2673dc8722034881f9e7db7bb137a8c0c8
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/665113
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Move the debug dump to HAL and add a stub for vgpu.
Bug 1595164
Change-Id: Ifdcdd8a8caca7a41919dad075fee1c87032f53b0
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/662722
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
setup_buffer_kind_and_compression() expects vm->big_page_size
to be set, which was not done for the vgpu case.
Bug 200064162
Change-Id: I15af3600fda0161aad2185ec7a12b560044cc171
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/662721
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Switch to a larger integer type for priv_cmd_queue get/put/size
fields. The previous 16-bit int type overflowed on >= 2048 gpfifo
buffer sizes. This triggered a div-by-zero kernel panic.
Bug 1592391
Signed-off-by: Janne Hellsten <jhellsten@nvidia.com>
Change-Id: Ibffcbbd145f39fdb4a63d05b1dcb42bb4b101795
Reviewed-on: http://git-master/r/667103
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Fix a memory leak: add the newly created state to the dmabuf priv's
state list, instead of the other way around.
Bug 1594784
Bug 200064154
Change-Id: I939746a254bb8bf4d06de7fcecba06c191da665f
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/668758
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Gpu channels may get spurious updates from at least nonstalling
semaphore wait interrupts. Protect data structure sanity by ignoring
releases on already released (= not in use) cde contexts.
Bug 200062826
Change-Id: I5940a7557e902bcfcff1a7e8e4593472d9ac306c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/666235
(cherry picked from commit 47dc2f41eb8054b099b6eb9a4a7d82c97295d415)
Reviewed-on: http://git-master/r/666657
GVS: Gerrit_Virtual_Submit
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
This must have occurred while rebasing dev-kernel-3.10
over kernel 3.18.
This change corrects the mistake.
Change-Id: I11fbc11105a032198828e8bc31da5ab92af0ffdb
Signed-off-by: Ishan Mittal <imittal@nvidia.com>
Reviewed-on: http://git-master/r/720240
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Add error prints in gk20a_do_idle() to narrow down
the failure point
Bug 200064302
Change-Id: Iffe1151bdc200a79b88e273b3b01523f8e46d130
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/664446
(cherry picked from commit bf1cd9b5551d27cb5cc468795cd147376f48e482)
Reviewed-on: http://git-master/r/666218
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Remove an undesired register from the regops whitelist on both
gk20a and gm20b.
Bug 1589732
Change-Id: I7747fafd3c2c32a9c5ce6388be73c7f61e509f0a
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/663373
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Bug 1587090
Bug 200050711
PMU dmem start address is unaligned.
Allocator allocates aligned length amount of memory
But address alloced is nto checked to be aligned, but
free checks for alignment of addresses before free.
For dmem case, frees never actually happened. This fix
ensures addresses are aligned.
Change-Id: I8b95f89940aa4d23355c3788dc95afb5c8867373
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/663140
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Remove support for gk20a sparse textures. We're using implementation
from user space, so gk20a code is never invoked.
Also removes ref_cnt for PTEs, so we never free PTEs when unmapping
pages, but only at VM delete time.
Change-Id: I04d7d43d9bff23ee46fd0570ad189faece35dd14
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/663294
Channel update callback for a channel that has no more cde jobs signals
that a cde context is free. Spurious channel updates may still happen
from at least nonstalling semaphore wait interrupts. Instead of scary
WARNs, use only gk20a_dbg_info() for info prints in these harmless
situations, and double check that only the first update starts a deleter
work for temporary contexts.
Change-Id: I68de8f35e2c366206c6efac3ee97025239e8bba2
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
(cherry-picked from commit f56a941b4962c5479291cae48e2abca6067e3f13)
Reviewed-on: http://git-master/r/660849
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Remove an undesired register from the regops whitelist on both
gk20a and gm20b.
Bug 1589712
Change-Id: I76e8ff1f4b68d6d5ce2c11adc08d984df7883e5e
Signed-off-by: Matt Craighead <mcraighead@nvidia.com>
Reviewed-on: http://git-master/r/663371
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Make mem_desc a generic container for buffers. Add functions for
allocating and mapping buffers to an address space which store their
data in mem_desc.
Change-Id: I031643442c6fd41f5e7222fe9b7bfcaf9b784db5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/660908
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Make pagepool size query into a function instead of storing the value
during boot time in a structure. This simplifies the structure and
users of pagepool size do not need to worry about whether it has
already been set.
Change-Id: Iba16e840cdf9b6c39449730237aa7d8fdff47848
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/660907
Fix below sparse warnings :
kernel/drivers/gpu/nvgpu/gm20b/mm_gm20b.c:283:5:
warning: symbol 'gm20b_mm_get_big_page_sizes' was not declared.
Should
it be static?
kernel/drivers/gpu/nvgpu/gm20b/clk_gm20b.c:1055:12:
warning: symbol 'gm20b_clk_get' was not declared. Should it be
static?
Bug 200032218
Change-Id: Id199b4b1853b3c933c91509fd550c7b5538cff29
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/660133
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
To run CUDA apps, the following minimal changes have been
made:
- power-gating is disabled for vgpu
- regop rd/wr returns -ENOSYS
Tools (debugger/profiler) support is known to not work and
not needed at this time.
Bug 200043227
Change-Id: I923caad78450e72d310fb9290cf2849ed5460ad5
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/592878
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
gm20b has more channels than sync points. We use aggressive reclaim
of sync points to offset that. Disable aggressive reclaim for gk20a
because it is not needed there.
Bug 1583849
Change-Id: I2a74b0504150a54cb8a97016effe20c5d905ac95
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/657095
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
obj_id from gk20a_alloc_obj_ctx is not used and calling free_obj_ctx is
effectively a no-op, since the corresponding channel is also freed.
Bug 200059216
Change-Id: Icbe2cf5dc21d50cb007bf73829705451ada106ac
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/655368
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
When removing the module, remove the device from devfreq and free
resources allocated when scaling is initialized.
Bug 1476801
Change-Id: I7bb0f8112a5bf7e5ce2fc56cf8af7059d910002c
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/594444
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add ->remove() for undoing the ->probe() and ->late_probe() in
gk20a_platform devices, and call it when gk20a is removed.
Bug 1476801
Change-Id: Ic9b29c0a7ea4a4cae7b5a0f66774bd799eb28434
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/594443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
