Commit Graph

69 Commits

Author SHA1 Message Date
Mahantesh Kumbar
c18364d0c4 gpu: nvgpu: moved pg out from pmu_gk20a.c/h
- moved pg related code to pmu_pg.c under common/pmu folder
  PG state machine support methods
  PG ACK handlers
  AELPG methods
  PG enable/disable methods

-prepended with nvgpu_ for elpg/aelpg global methods
by replacing gk20a_

JIRA NVGPU-97

Change-Id: I2148a69ff86b5c5d43c521ff6e241db84afafd82
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1498363
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-13 13:19:47 -07:00
Deepak Nibade
0ad7f1d9aa gpu: nvgpu: use nvgpu specific nvhost APIs
Remove use of linux specifix header files
<linux/nvhost.h> and <linux/nvhost_ioctl.h>
and use nvgpu specific header file <nvgpu/nvhost.h>
instead
This is needed to remove all Linux dependencies
from nvgpu driver

Replace all nvhost_*() calls by
nvgpu_nvhost_*() calls from new nvgpu library

Remove platform device pointer host1x_dev
from struct gk20a and add struct
nvgpu_nvhost_dev instead

Jira NVGPU-29

Change-Id: Ia7af70602cfc16f9ccc380752538c05a9cbb8a67
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1489726
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2017-06-08 06:37:15 -07:00
Mahantesh Kumbar
673dd97160 gpu: nvgpu: moved & renamed "struct pmu_gk20a"
- Renamed "struct pmu_gk20a" to "struct nvgpu_pmu" then moved
to file "pmu.h" under folder "drivers/gpu/nvgpu/include/nvgpu/"

- Included header file "pmu.h" to dependent file &
removed "pmu_gk20a.h" include if its usage is not present.

- Replaced "struct pmu_gk20a" with "struct nvgpu_pmu" in dependent
source & header files.

JIRA NVGPU-56

Change-Id: Ia3c606616831027093d5c216959c6a40d7c2632e
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1479209
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-04 23:05:18 -07:00
Vijayakumar
38ec046691 gpu: nvgpu: pass right data to aelpg control calls
Fill aelpg controller id explicitly and use right structure within
command union

bug 1932265

Change-Id: Ie06bf8b1b124e67871dd1443e14a1080473a7ab1
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1493125
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Tested-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
2017-05-31 22:53:48 -07:00
Deepak Nibade
8f4a590cf2 gpu: nvgpu: remove TEGRA_CLK_FRAMEWORK support
CONFIG_TEGRA_CLK_FRAMEWORK is no longer supported
hence remove this config and all the code that is
protected with this config

Jira NVGPU-49

Change-Id: Ica28019e0c99e95743216e005ba2fba20357b2d5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1483090
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-24 04:55:47 -07:00
Terje Bergstrom
b7fca01b0e gpu: nvgpu: Scrub gk20a_platform dependencies
Remove gk20a_platform dependencies from gk20a.h. This makes
gk20a_platform a Linux platform specific data structure. Add #include
for platform_gk20a.h in the source files that still depend on Linux.

JIRA NVGPU-16

Change-Id: Ib098accd34a1f5066eb8680c387f9b178169f3f0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463547
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-18 15:14:31 -07:00
Terje Bergstrom
7acc993cdb gpu: nvgpu: Move can_railgate & railgate_delay to gk20a
Copy can_railgate and railgate_delay to struct gk20a at probe time,
and access them from gk20a instead of platform_gk20a.

JIRA NVGPU-16

Change-Id: I63d4f4aff7eb17a167775fd7982a1b548bbca3a5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1463543
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-14 00:05:12 -07:00
Terje Bergstrom
7665421874 gpu: nvgpu: Replace use of bitops.h and kernel.h
Remove use of linux/kernel.h and linux/compiler.h. We don't use
anything in those headers.

Also replace use of linux/bitops.h with new wrapper nvgpu/bitops.h.

JIRA NVGPU-13

Change-Id: Iefa6b4598d5a5e7fc386c0a7a554e778a87010d6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460777
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2017-04-12 07:01:12 -07:00
Alex Waterman
24e1c7e0a7 gpu: nvgpu: Use new kmem API functions (misc)
Use the new kmem API functions in misc gk20a code. Some additional
modifications were also made:

  o  Add a struct gk20a pointer to gk20a_fence to enable proper
     kmem free usage.
  o  Add gk20a pointer to alloc_session() in dbg_gpu_gk20a.c to
     use kmem API for allocating a session.
  o  Plumb a gk20a pointer through the fence creation and deletion.
  o  Use statically allocated buffers for names in file creation.

Bug 1799159
Bug 1823380

Change-Id: I3678080e3ffa1f9bcf6934e3f4819a1bc531689b
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1318323
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-30 12:36:09 -07:00
David Nieto
2a502bdd5f gpu: nvgpu: pass gk20a struct to gk20a_busy
After driver remove, the device structure passed in gk20a_busy can be
invalid. To solve this the prototype of the function is modified to pass
the gk20a struct instead of the device pointer.

bug 200277762
JIRA: EVLR-1023

Change-Id: I08eb74bd3578834d45115098ed9936ebbb436fdf
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1320194
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-03-23 21:05:35 -07:00
Srikar Srimath Tirumala
fef62b02ab gpu: nvgpu: add missing header
Allow NA_GPCPLL to be enabled on T210 K4.4

Bug 200233943

Change-Id: I5ea0b9d1de51b510f5c6671339dee2953bf1ec80
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1280829
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-30 16:34:24 -08:00
Srikar Srimath Tirumala
702ed11f94 Revert "gpu: nvgpu: fix gpcclk for K4.4"
This reverts commit a918003694.

Change-Id: Idf39cc0946c5c4df82c7c4b6afa225b1f8d5a923
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1280827
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-30 16:34:12 -08:00
Mahantesh Kumbar
efe0758081 gpu: nvgpu: fix pmu->mscg_stat optimization issue
- with help of WRITE_ONCE() & ACCESS_ONCE()
  make sure variable pmu->mscg_stat read/write goes through
  without optimization
- Added WRITE_ONCE() define for kernel-3.18 version & below
  to support backward compatibility

issue: inconsistencies on getting MSCG to trigger consistently in P5
due to a lack of memory barrier around and volatile accesses to the
variable pmu->mscg_stat

JIRA DNVGPU-71

Change-Id: I04d30493d42c52710304dbdfb9cb4a1e9a76f2c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1252524
(cherry picked from commit 8af7fc68e7ab06a856ba4ef4e44de7336682361b)
Reviewed-on: http://git-master/r/1271614
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-17 08:15:12 -08:00
Mahantesh Kumbar
bb5a9e1c6c gpu: nvgpu: PG sysfs update for RPPG/MSCG
- Added sysfs node to control RPPG/MSCG enable/disable
- RPPG is controlled with elpg_enable  node, same node used to
  control ELPG.
- MSCG is controlled with mscg_enable node

JIRA DNVGPU-71

Change-Id: I1a1b33d7425c25c9cfd466f7cabce08f3152326d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1251611
(cherry picked from commit eaf255f2dd3d20c071714dd509a785e9172399bf)
Reviewed-on: http://git-master/r/1274645
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-01-16 04:53:38 -08:00
Peter Boonstoppel
f15a86f265 gpu: nvgpu: Add sysfs nodes for timeslice min/max
The timeslice values that can be selected for a particular channel/tsg
are bounded by a static min/max. This change introduces two sysfs
nodes that allow these bounds to be configured from userspace.

min_timeslice_us
max_timeslice_us

Bug 200251974
Bug 1854791

Change-Id: I5d5a14225eee4090e418c7e43629324114f60768
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1280372
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-01-12 08:23:56 -08:00
Srikar Srimath Tirumala
23f9dddbb6 gpu: nvgpu: fix build break
Fix the build break caused by
"commit : I88d94542092f92e68dc63c40444a70991d1f6129"

Change-Id: Id457c26b17ba8fc05e26fb5ad3b3a4873362b950
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1274496
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
2016-12-20 16:57:01 -08:00
Srikar Srimath Tirumala
a918003694 gpu: nvgpu: fix gpcclk for K4.4
Move the sw initialization of the gpcclk from gpu rail ungate path
to the nvgpu probe path. This allows gpcclk to register itself
successfully with CCF and makes it discoverable for other clients
early on during boot.

Bug 200233943
Bug 200259437

Change-Id: I88d94542092f92e68dc63c40444a70991d1f6129
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1265549
Reviewed-by: Tejal Kudav <tkudav@nvidia.com>
2016-12-20 16:17:33 -08:00
Laxman Dewangan
665b017c32 gpu: nvgpu: gk20a: Get rid of include of mach/clk.h
mach/clk.h just include the linux/clk/tegra.h and hence directly
include this header instead of via mach/clk.h.

bug 200259459

Change-Id: Ia84c325309c308e02bb5dc1a8b32ef669053f439
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/1264322
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2016-12-04 23:10:42 -08:00
Peter Boonstoppel
01e61860fa gpu: nvgpu: gm20b expose gpcclk through CCF
Register gpcclk with Common Clock Framework to expose GPCPLL frequency
control

Bug 200233943

Change-Id: Id6f7bbaca15f22157b91b092c2a035af933fa71e
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1236979
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-15 12:30:06 -08:00
Terje Bergstrom
0f58a46904 gpu: nvgpu: Remove duplicate err returning path
railgate_enable_store() has two places where err is checked and
returned. Because we have only one place where err can be set,
the second check and return are superfluous.

Change-Id: Id45923fc829f061fee34fa1abca0359b443e6f0d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1249960
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2016-11-11 08:20:27 -08:00
Deepak Nibade
c284516ead gpu: nvgpu: support suspend/resume with user disabled railgating
We take an extra power refcount when we disable railgating
through railgate_enable sysfs
And that breaks suspend/resume since we check for power
refcount first in gk20a_pm_suspend()

Fix this with following :
- set a flag user_railgate_disabled when User
  disables railgating through sysfs railgate_enable
- in gk20a_pm_suspend(), drop one power refcount
  if flag is set
- in gk20a_pm_resume(), take one refcount again
  if flag is set

Fix __gk20a_do_idle() to consider this extra refcount as well.
Add new variable target_ref_cnt and use it instead of
assuming target refcount of 1

In case User has disabled rail gating, set this target
refcount as 2

Also, export gk20a_idle_nosuspend() which drop power refcount
without triggering suspend

Bug 200233570

Change-Id: Ic0e35c73eb74ffefea1cd90d1b152650d9d2043d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1236047
(cherry picked from commit 6e002d57da4b5c58ed79889728bb678d3aa1f1b1)
Reviewed-on: http://git-master/r/1235219
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-10-18 11:08:01 -07:00
Sachit Kadle
f22236c0c1 gpu: nvgpu: use vzalloc for golden_ctx_image
As the size of the golden_ctx_image is large,
the allocation may intermittently fail when using
kzalloc. Since we don't need physically continguous
memory, use vzalloc instead.

Bug 200231436

Change-Id: Ic2fb31dea94c8721832dc257334608e1fc283943
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1207172
(cherry picked from commit 994a7b162ec74518ae0f50dfb5ac197e44019992)
Reviewed-on: http://git-master/r/1229472
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2016-09-29 20:26:41 -07:00
Terje Bergstrom
f56ed459dd gpu: nvgpu: Skip calling undefined prod callbacks
Fix rest of code to not call prod callbacks that are set to NULL.

Bug 1799537

Change-Id: I756bb1f7ef58ba753ac43a2be6f125107be3cf34
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1209133
(cherry picked from commit 5f4d7b42b6101407fde8c4a7dcdd3633eca85ae5)
Reviewed-on: http://git-master/r/1217297
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-08 20:05:49 -07:00
seshendra Gadagottu
e2b965e555 gpu: nvgpu: avoid host1x device dependency
Create sysfs nodes for gpu under host1x, only when
host1x device dependncy present.

For all gpus create syfs nodes under
generic gpu name "gpu.0"

Bug 1735760

Change-Id: I4b4a984139e0c33feadd95613c2f2076bc2db33b
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1181068
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
2016-07-25 17:09:42 -07:00
Deepak Nibade
e27c72446b gpu: nvgpu: simplify power management
We currenlty initialize both runtime PM and pm_domains frameworks
and use pm_domain to control runtime power management of NvGPU

But since GPU has a separate rail, using pm_domain is not
strictly required
Hence remove pm_domain support and use runtime PM only for all
the power management
This also simplifies the code a lot

Initialization in gk20a_pm_init()
- if railgate_delay is set, set autosuspend delay of runtime PM
- try enabling runtime PM
- if runtime PM is now enabled, keep GPU railgated
- if runtime PM is not enabled, keep GPU unrailgated
- if can_railgate = false, disable runtime PM and keep
  GPU unrailgated

Set gk20a_pm_ops with below callbacks for runtime PM
static const struct dev_pm_ops gk20a_pm_ops = {
.runtime_resume = gk20a_pm_runtime_resume,
.runtime_suspend = gk20a_pm_runtime_suspend,
.resume = gk20a_pm_resume,
.suspend = gk20a_pm_suspend,
}

Move gk20a_busy() to use runtime checks of pm_runtime_enabled()
instead of using compile time checks on CONFIG_PM

Clean up some pm_domain related code

Remove use of gk20a_pm_enable/disable_clk() since this
should be already done in platform specific unrailgate()/
railgate() APIs

Fix "railgate_delay" and "railgate_enable" sysfs to use
runtime PM calls

For VGPU, disable runtime PM during vgpu_pm_init()
With this, we will initialize vgpu with vgpu_pm_finalize_poweron()
upon first call to gk20a_busy()

Jira DNVGPU-57

Change-Id: I6013e33ae9bd28f35c25271af1239942a4fa0919
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1163216
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-07-08 00:58:53 -07:00
Seshendra Gadagottu
8b45a5e016 gpu: nvgpu: fix coverity issues in sysfs/debugfs
Fix coverity issues in debugfs related to null check
before accessing data member.

Fix coverity issues in sysfs related to error code
over-write and unintilized error code.

coverity ids: 20087564, 20087460, 20087461
Bug 200192125

Change-Id: If82288fca18464dca7093ce10f0beb1272489609
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1171943
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-27 16:02:44 -07:00
Seshendra Gadagottu
e9fd9e9fe3 gpu: nvgpu: sysfs: use snprintf instead of sprintf
Use snprintf instead of sprintf to avoid
any buffer overflows.

Bug 200192125

Change-Id: I6df43c6d6ee62677f5fd4d4e99f16be77c9e101e
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1164312
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-14 14:03:12 -07:00
Lakshmanan M
6299b00beb gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
   for gm206 GPU family
5) Added generic mechanism to identify the
   CE engine pri_base address for gm206
   (CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
   made generic way
7) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:31:34 -07:00
Seshendra Gadagottu
5272552ab1 gpu: nvgpu: remove clockgate_delay param
Removed platform data parameter clockgate_delay, since it is not
really used for gpu clock gating any more. Also use railgate_delay
as autosuspend delay instead of clockgate_delay.

Change-Id: I5b594b5a0e84295ed9971ecdf4865dc1a7dd936d
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1159593
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:05:05 -07:00
Seshendra Gadagottu
697c8c1a98 gpu:nvgpu: add sysfs nodes for ptimer freq
With current ptimer_scale_factor sysfs node, some
precision is lost while converting scaling factor to
floating point and similarly more precision will be lost
while converting back to fixed point. To avoid this,
kernel will export following two sysfs nodes:

ptimer_ref_freq : ptimer reference frequency( in hz)
ptimer_src_freq : ptimer source frequency (in hz) in current
                  chip architecture.

Client will apply proper scaling factor by doing
ptimer_ref_freq / ptimer_src_freq.

Change-Id: I84516e235cc3fffe4cb9a73903416478f4050a9a
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1139985
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2016-06-06 20:43:27 -07:00
Vijayakumar
dc6aa0663f gpu: nvgpu: gk20a: fix elpg sysfs control
bug 200200943

When we enable ELPG through sysfs there is a possibility of
refcounting twice as enable ELPG function is done in
scheduled work during rail gating exit and also called from sysfs
write. Just updating elpg enable/disable flag is good enough
as ELPG code uses it during rail gating exit

Change-Id: Ibb267d4ce30b9848abcde29882b90d884ef213bb
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1149587
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
2016-05-22 23:54:45 -07:00
Richard Zhao
e7664f9345 gpu: nvgpu: make tpc_fs_mask work on production board
On production fused boards, it uses gr_fe_tpc_fs_r() to mask TPCs,
rather than fues.

Bug 1734150

Change-Id: I7b4eb428f1ad0cf841a57214e0c8c1e8f17b2c5a
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1111630
(cherry picked from commit 869ea54967812e03d9f1e69775ca56fd6459216c)
Reviewed-on: http://git-master/r/1122121
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-14 10:10:24 -07:00
Terje Bergstrom
e8bac374c0 gpu: nvgpu: Use device instead of platform_device
Use struct device instead of struct platform_device wherever
possible. This allows adding other bus types later.

Change-Id: I1657287a68d85a542cdbdd8a00d1902c3d6e00ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120466
2016-04-08 09:42:41 -07:00
Sumit Singh
466dc96afe Merge branch 'PM_RUNTIME-Removal' into 'dev-kernel-3.18'
This change performs merge of 'PM_RUNTIME_Removal' dev-branch with
'dev-kernel-3.18' branch. It replaces CONFIG_PM_RUNTIME with CONFIG_PM.

JIRA TPM-704

Change-Id: I306e254716f275c283f727fc232d7244939542b6
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
2016-03-30 11:17:41 +05:30
Seshendra Gadagottu
2e0770fecc gpu: nvgpu: create generic name for sysfs module
Make gpu sysfs name same across different chips.
If gpu device name is different from "gpu.0", then
create symlink with generic name under same parent.

Generic gpu syfs module path: /sys/devices/gpu.0

Bug 200161014

Change-Id: I9a7d5971c069d5a33f8e5c811d4578231f710878
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/840742
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-23 07:50:29 -07:00
Sumit Singh
383c769995 gpu: nvgpu: Replace CONFIG_PM_RUNTIME with CONFIG_PM
After commit b2b49ccbdd54 (PM: Kconfig: Set PM_RUNTIME if PM_SLEEP is
selected) PM_RUNTIME is always set if PM is set, so #ifdef blocks
depending on CONFIG_PM_RUNTIME may now be changed to depend on
CONFIG_PM.

Replace CONFIG_PM_RUNTIME with CONFIG_PM everywhere under
drivers/gpu/nvgpu/.

JIRA TPM-704

Change-Id: I23965838ff6ec77829076cd834e87641fb68e268
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
2016-03-15 16:17:42 +05:30
Seshendra Gadagottu
471c14f76e gpu: nvgpu: update slcg/blcg prod setiings
Add following missing prod settings:
  blcg bus
  blcg ce
  slcg ce2
  slcg chiplet
  slcg gr

Bug 1689806

Change-Id: Ic7c9afdb1fc47ad71ca326384f5d2a4528121abe
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1030987
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-03-14 20:15:17 -07:00
Seshendra Gadagottu
19b3bd28b3 gpu: nvgpu: use platform data for ptimer source rate
Instead of depending on clock frame-work, use platform data
for ptimer source rate. Removed ptimerscaling10x platform
data, and use ptimer source frequency to calculate
ptimerscaling factor.

Reviewed-on: http://git-master/r/819030
(cherry picked from commit dd291334d54dab80cab7eb1656dffc48a59610b4)

Change-Id: I7638ce9875a6e440bbfc2ba2da0d0b094b2700ff
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/827300
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-11-04 14:38:34 -08:00
Seshendra Gadagottu
5c26f72fe1 gpu: nvgpu: Add sysfs node to enable rail gating
Add sysfs node "railgate_enable" to enable
gpu railgating dynamically.

Bug 1552469

Reviewed-on: http://git-master/r/804746
(cherry picked from commit 53d76d1d1576a96c70f66b744411d2909ec8414f)

Change-Id: I69ac63958b00ae4ea5d9ccbaed03316d35ddc5eb
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/822208
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-10-26 09:46:18 -07:00
Seshendra Gadagottu
8ed6ade94f gpu: nvgpu: update slcg xbar prod settings
Bug 1689806

Change-Id: I368ad8fb64e49b21ba61c519def1f86e1ca6e492
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/806116
(cherry picked from commit 1a3bbe989a795d379703e7f4b915f6e1bb38c2c3)
Reviewed-on: http://git-master/r/805480
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-10-06 13:28:51 -07:00
Deepak Nibade
ef57db8606 gpu: nvgpu: sysfs to check if GPU is railgated
Add below sysfs to check if GPU is railgated or not :
/sys/devices/platform/gpu.0/is_railgated

Bug 200124736

Change-Id: Iafac48bbe82fcd422eeb2b948490e8dc8ad3801a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/773457
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2015-07-24 03:33:24 -07:00
Anders Kugler
140d213de6 gpu: nvgpu: sysfs queries
Export the gpu's safe fmax_at_vmin frequency so it can be
queried from userspace (e.g. PHS).

Bug 1566108

Change-Id: I47326588ebd443f189a6051edbf95b35b35636d1
Signed-off-by: Anders Kugler <akugler@nvidia.com>
Reviewed-on: http://git-master/r/743501
(cherry picked from commit a977495878a486ca45c7de969582fd9ea949b0f0)
Reviewed-on: http://git-master/r/753279
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-06-06 07:24:52 -07:00
Deepak Nibade
087ce7301b gpu: nvgpu: return error if GPU not initialized
While writing to sysfs "tpc_fs_mask", we need to have
GPU initialized (we need to have called gk20a_busy()
at least once before)

If this is not happened yet, then return error

Bug 1456969

Change-Id: I09db6bcaa44b8939246cb5ed1205f3fbc0ee0552
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/731327
(cherry picked from commit 0dbbcf60bbad6b9a31392d2290a3e26c5daa1e5d)
Reviewed-on: http://git-master/r/731671
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2015-05-18 11:19:27 +05:30
Seshendra Gadagottu
918485b5e0 gpu: nvgpu: wake-up gpu for rail gating delay setting
Currently new gpu rail gating delay is not effective
until next gpu rail gate and ungate. To make new
rail gate delay effective immediately, wakeup gpu after
setting new delay.

Change-Id: I80889687e9d3d577ea783cdf5688074c06d602cf
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/714961
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-04-04 18:59:43 -07:00
Deepak Nibade
45e261ac19 gpu: nvgpu: add flag for CAR reset in do_idle()
Add "force_reset" flag to __gk20a_do_idle()

For real world use cases like VPR resizing, we cannot wait
for railgate_delay (which is 500 mS). Hence use CAR reset
for this use case. (this is done via gk20a_do_idle() API
with force_reset = true)

Some of the test cases make use of sysfs "force_idle" and
they expect GPU to be into really railgated state and
not in CAR reset.
Hence when called from sysfs, set force_reset = false.

When global flag "force_reset_in_do_idle" is set, it will
override local flags and force CAR reset case.
This is desired in cases where railgating is not enabled

Also, set force_reset_in_do_idle = false for GM20B since
railgating has been enabled for GM20B

Bug 1592997

Change-Id: I6c5af2977c7211ef82551a86a7c1eb51b8ccee60
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/711615
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-04-04 18:08:54 -07:00
Dan Willemsen
b53b2973fe gpu: nvgpu: Fix/HACK for v3.18
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2015-03-18 20:19:10 -07:00
Deepak Nibade
f8f6b29884 gpu: nvgpu: support config of TPC FUSE dynamically
Follow steps below to config active TPC number:
echo 1 > /sys/devices/platform/host1x/gpu.0/force_idle
echo 0x1/0x2/0x3 > /sys/devices/platform/host1x/gpu.0/tpc_fs_mask
echo 0 > /sys/devices/platform/host1x/gpu.0/force_idle

where,
0x1 : disable TPC1
0x2 : disable TPC0
0x3 : both TPCs active

Also, add API set_gpc_tpc_mask to update the TPCs and call this
API after update to sysfs "tpc_fs_mask"
Once fuses are updated for new TPC settings, we need to
reconfigure GR and golden_image. Hence disable gr->sw_ready
and golden_image_initialized flags.

Also, initialize gr->tpc_count = 0 each time in
gr_gk20a_init_gr_config(), otherwise it goes on adding tpc count

Bug 1513685

Change-Id: Ib50bafef08664262f8426ac0d6cbad74b32c5909
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/552606
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2015-03-18 12:12:10 -07:00
Konsta Holtta
200f63ce7b gpu: nvgpu: use correct parent for sysfs remove
sysfs_remove_link's first argument expects the kobj of the directory
where the link resides, not the kobj of the link itself.

Change-Id: I89f7d681135e8eb0ff16406271cd19bf9c04f185
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/592111
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:11:58 -07:00
Sam Payne
8c6a9fd115 Revert "gpu: nvgpu: GR and LTC HAL to use const structs"
This reverts commit 41b82e97164138f45fbdaef6ab6939d82ca9419e.

Change-Id: Iabd01fcb124e0d22cd9be62151a6552cbb27fc94
Signed-off-by: Sam Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/592221
Tested-by: Hoang Pham <hopham@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:11:56 -07:00
Terje Bergstrom
2d5ff668cb gpu: nvgpu: GR and LTC HAL to use const structs
Convert GR and LTC HALs to use const structs, and initialize them
with macros.

Bug 1567274

Change-Id: Ia3f24a5eccb27578d9cba69755f636818d11275c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590371
2015-03-18 12:11:54 -07:00