Commit Graph

126 Commits

Author SHA1 Message Date
David Nieto
1f0a38797f gpu: nvgpu: prevent hang on failing arbiter init
The current code can lead to application hang when
opening device on first time if the arbiter fails
to set the clocks

Also it solves a buffer overrun condition in case
the requested frequency is above the maximum range
of the VF curve

bug 1835042

Change-Id: I385401ea27d5cc4bfa41b7ca2eb3a1db53138418
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1245911
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1268061
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:52 +05:30
David Nieto
136a9919e6 gpu: nvgpu: resolve signed/unsigned mismatch
JIRA DNVGPU-143

Change-Id: I0536aff4f994efc3dbd2db949068f8e1345ece9c
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1268107
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:52 +05:30
David Nieto
5ab254c6e8 gpu: nvgpu: make clock arbiter lockless
Modification of the arbiter to remove all locking
from the arbiter callback and move the callbacks
out of the global queue

Adding modification to call for updated values of
vf table from arbiter init function and on
vf table update

JIRA: DNVGPU-170

Change-Id: I7a7d34c0590522901e06356c06fd8114ebf10f37
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1243212
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1268009
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:52 +05:30
David Nieto
c123d5056d gpu: nvgpu: gpu: read effective frequence from counter
(1) modified counters debug code to export to the driver
(2) modified arbiter to read from those functions
(3) modified counter for higher accuracy on MHz range

JIRA DNVGPU-164

Change-Id: I2bbf7c9be4dc59718d1d91c53028a39020b5aea5
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239467
GVS: Gerrit_Virtual_Submit
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1268008
2016-12-27 15:26:52 +05:30
David Nieto
1cf7baa7fd nvgpu: gpu: Use pstates for MCLK range
JIRA DNVGPU-168

Change-Id: I7ac05dca745b22b411fc0aa797969b97536dd2e6
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239466
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1267121
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:52 +05:30
David Nieto
c4bb19d46e nvgpu: gpu: arbiter for vf switch management
JIRA DNVGPU-143

The arbiter is charged with selecting the proper
frequencies when multiple applications submit
simultaneously clock change requests

On the current implementation, the arbiter guarantees
that the selected frequency will be always higher
or equal to the request, as long as the request is
in range.

The current code is not yet realtime friendly, as
requests are not pre-allocated.

Summary of changes:
(1) pstate/vf switch no longer selects boot frequency
(2) changed mclk code change to accept input freq
(3) added arbiter
(4) now a single session can submit concurrent requests
the last request is the one that applies for that
session
(5) modified locking mechanism to reduce lock contention
(6) Added callback to notify the arbiter that the VF
table has changed and is no longer valid (PMU/Thermals
must call this when VF table is invalid)
(7) changed internal API to work with MHz
(8) added debugfs for stats

Change-Id: I6a7b05c9447761e8536f84ef86b5ab0793164d63
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1239461
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1267120
Reviewed-by: Automatic_Commit_Validation_User
2016-12-27 15:26:52 +05:30
Thomas Fleury
7a8b12ab63 gpu: nvgpu: clk requests completion and event fds
Install one completion fd per SET request.
Notifications on dedicated event fd.
Changed frequencies unit to Hz from MHz.
Remove sequence numbers from dummy arbiter.
Added effective clock type (query frequency from counters).

Jira DNVGPU-125

Change-Id: Id5445c6ae1d6bf06f7f59c82ff6c5d3b34e26483
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1230239
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
(cherry picked from commit d17083f4ceb69725c661678607a3e43148d38560)
Reviewed-on: http://git-master/r/1243106
2016-12-27 15:26:51 +05:30
Thomas Fleury
3d9c33c595 gpu: nvgpu: clk arbiter skeleton
Add clock arbiter skeleton with support of clock sessions,
notifications on clock changes, request numbering, and asynchronous
handling of clock requests. Provides minimum behaviour to allow
unit tests implementation. Actual arbitration and clock settings
will be done separately. For now, dummy arbiter keeps last
requested target mhz. Actual arbiter may move to a lockless
implementation.

Jira DNVGPU-125

Change-Id: I6a8e443fb0d15dc5f1993e7260256d71acddd106
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1223476
(cherry picked from commit cb130825d84e4124d273bd443e2b62d493377461)
Reviewed-on: http://git-master/r/1243105
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:51 +05:30
Terje Bergstrom
294e2520d5 gpu: nvgpu: gp106: Program RX bias current
Hard code RX bias current to 0x2.

Bug 1833830

Change-Id: I1107bad52de7b38d311bc5795739777a4bb4239a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1253656
(cherry picked from commit 7e853b0c62043cc53847e3535e05886d574dc779)
Reviewed-on: http://git-master/r/1255724
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:51 +05:30
Terje Bergstrom
0bef6c9897 gpu: nvgpu: gp106: Expose the boot max freq
Expose the currently hard coded boot frequency, which is at the same
time the max frequency. We use it for filling in GPU characteristics.

Bug 200251486

Change-Id: I3c0abb7a385a83f61b93ddfa857b982c850853e3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252906
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
Tested-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-12-27 15:26:51 +05:30
Terje Bergstrom
d8da1d6438 gpu: nvgpu: Fix signed comparison bugs
Fix small problems related to signed versus unsigned comparisons
throughout the driver. Bump up the warning level to prevent
such problems from occuring in future.

Change-Id: Ib7026728ef0e8c3c9e68956fc9794ec3a786a8a2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252069
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-27 15:26:51 +05:30
Vijayakumar
f533ec3cbd gpu: nvgpu: fix sram rail volt calculation
JIRA DNVGPU-120

SRAM rail voltage needs to be picked up from SRAM
index of VF entries in CLK prog table.

Change-Id: Iabfff62edeec5aa9c2ead62d6b943fb2ebb952ed
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1227665
(cherry picked from commit 8053260438bc94397b20e74cf18453624ebeb325)
Reviewed-on: http://git-master/r/1244664
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
Mahantesh Kumbar
741d78ec45 gpu: nvgpu: construct/load tabels & set voltage
- Read voltage tables from VBIOS & construct
  then send to PMU.
- compare & set voltage based on
  mclk/gpc2clk clk, take higher voltage
  between two & set.

JIRA DNVGPU-122

Change-Id: I23e7b101a3b1c1b6596620fc6b8319c70bd9a488
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1224365
(cherry picked from commit e0055c3ec798b8312df3fa9bf92bde8c57c6f58c)
Reviewed-on: http://git-master/r/1244657
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
Vijayakumar
c7fbd76e71 gpu: nvgpu: create function to program coreclk
JIRA DNVGPU-123

now a function can be called with GPC2CLK value
It will take care calculating slave clock values
and calling VF inject to program clock
Made programming of boot clock code to use this
newly created function.

Change-Id: I74de7e9d98e379e94175ed2d9745ce3ab6c70691
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1221976
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1235056
2016-12-27 15:26:50 +05:30
Vijayakumar
3c351f5bb2 gpu: nvgpu: add function to retrieve clk points
JIRA DNVGPU-123

Function will copy possible clock points for
a given master clock domain to pointer passed.
pointer with NULL value and count of zero can be passed
to query number of clock points for a given domain so that
memory can be allocated and function called again to
fill clock points

Change-Id: Iec6206f23789980036be99793599e934bd221035
Reviewed-on: http://git-master/r/1218912
(cherry picked from commit 9219697bff1e12deb605325055a02a7b387996e9)
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1235055
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
Vijayakumar
1b10905120 gpu: nvgpu: support to parse VF table
JIRA DNVGPU-123

function was added to retrieve V for F or
F for V for a given clock domain.
Clock domain can be master or slave.
F or V can be intermediate point between two
successive V or F values in VF table.
VF table should be cached before calling this function.
A F value below Fmin will return Vmin.
F > Fmax will return error
A V value above Vmax wil return F max.
A V value below Vmin will return error.

Change-Id: I28b4e8647510c6933e9e1204cfff31d74616e11a
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1211234
(cherry-picked from commit 5b83b03f2454fbec8d49a064ed09b09c92d3e9fa)
Reviewed-on: http://git-master/r/1235054
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
Vijayakumar
e28ef73ec9 gpu: nvgpu: add support to cache VF table from PMU
JIRA DNVGPU-118

Change-Id: I5c6a919d18e6de077e03180ba70441cfc9791350
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1209849
(cherry picked from commit 469f35e3f65964a3402f7e0c49862bd44b68936a)
Reviewed-on: http://git-master/r/1233040
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
David Nieto
905f1c0392 gpu: nvgpu: parse and execute mclk shadow script
* Parsing of shadow registers from VBIOS
 * Partial devinit engine interpreter implementation

JIRA DNVGPU-117

Change-Id: I42179748889f17d674ad0a986e81c418b3b8df11
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1214956
Reviewed-on: http://git-master/r/1237293
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:50 +05:30
David Nieto
41838fc2bb gpu: nvgpu: gp106: MCLK P8/P5 sequences and API
Adds P5/P8 sequences and simple debugfs API to
change from P0->P5

JIRA DNVGPU-117

Change-Id: I5811a5bddd0e11074524cce421bff1e3d441228d
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1208655
(cherry picked from commit dd410a86263e2407e043743945cf09a77910d745)
Reviewed-on: http://git-master/r/1231035
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:49 +05:30
Mahantesh Kumbar
2d3ba5478d gpu: nvgpu: Clocks params update
- Clocks params update as per r370

JIRA DNVGPU-116

Change-Id: I0aaa1e275aaa2027f2839f3fe24c9aee3e14fd8d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1212827
(cherry picked from commit 54df6ad9668d46dffb5b9d03265948a47611ff13)
Reviewed-on: http://git-master/r/1227288
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:49 +05:30
Mahantesh Kumbar
5159f6bf43 gpu: nvgpu: sequencer-script update
Update to sequencer script to support SKU without display.

Bug 200231242

Change-Id: Ibd983166be823370fc687eb2fe9bae3aa8c0dab7
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1207096
(cherry picked from commit b573a627b3fe7697c90def46eaf83d755c5d2dee)
Reviewed-on: http://git-master/r/1227247
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-27 15:26:49 +05:30
Terje Bergstrom
3d275d19c3 gpu: nvgpu: gp106: Prune non-existing registers
Prune non-existing registers from mclk shadow register list.

Bug 1799537

Change-Id: I8034a1820ef21e550616a5135856b05c2f375d6f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1208018
(cherry picked from commit cb988bb28dd914ea291cedec799d055f3d71d877)
Reviewed-on: http://git-master/r/1227266
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:49 +05:30
Vijayakumar Subbu
432017248e gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-42

Change-Id: Ic2fca9d0cf82f2823654ac5e8f0772a1eec7b3b5
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1205850
(cherry picked from commit b9f5c6bc4e649162d63e33d65b725872340ca114)
Reviewed-on: http://git-master/r/1227257
GVS: Gerrit_Virtual_Submit
2016-12-27 15:26:49 +05:30
Mahantesh Kumbar
38ad90b484 gpu: nvgpu: Adding support for mclk module
JIRA DNVGPU-88

Change-Id: Idecfff5a80fadde77887385491dd6b73b1956bac
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1202551
(cherry picked from commit 3bcf9bad93fb6fdd4b87430b346ea41533149108)
Reviewed-on: http://git-master/r/1223854
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-27 15:26:49 +05:30
Srikar Srimath Tirumala
34d8421ab4 gpu: nvgpu: fix round_rate ops for CCF
Make round_rate return max freq when called with a value greater than
the max clock frequency.

Bug 200233943

Change-Id: Id128611f2d09b17a0a0edfefd4b526fd8c215bce
Signed-off-by: Srikar Srimath Tirumala <srikars@nvidia.com>
Reviewed-on: http://git-master/r/1272305
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Jonathan Hunter <jonathanh@nvidia.com>
Tested-by: Jonathan Hunter <jonathanh@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Shreshtha Sahu <ssahu@nvidia.com>
2016-12-20 23:05:56 -08:00
Peter Boonstoppel
3a6d47db9d gpu: nvgpu: Move gk20a clock helper functions to common file
This allows us to use these functions with both Tegra and Common Clock
Frameworks

Bug 200233943

Change-Id: I5a394d7bacfecabeabc64d32dab214d2e7cf89d7
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/1242481
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-15 12:29:59 -08:00