Commit Graph

124 Commits

Author SHA1 Message Date
Mahantesh Kumbar
98e349ab7e gpu: nvgpu: PG statistics update
- PG statistics read support for multiple engines
- updated stat_dmem_offset member to array to hold
  dmem offset of PG engines
- PMU allocates memory in DMEM for each PG engine requested,
  updated gk20a_pmu_get_elpg_residency_gating() to get
  engine statistics for requested PG engine

JIRA DNVGPU-71

Change-Id: I2ddade37f85716f757bf33034dbff816184577eb
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1250506
(cherry picked from commit 68ba7a97d6662b87d0e489365d8afb8e2d237a03)
Reviewed-on: http://git-master/r/1270972
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-25 22:20:09 -08:00
Mahantesh Kumbar
71fbfdb2b8 gpu: nvgpu: MSCG support
- Added enable_mscg, mscg_enabled & mscg_stat flags,
  mscg_enabled flag can be used to controll
  mscg enable/disable at runtime along with mscg_stat flag.
- Added defines & interface to support ms/mclk-change/post-init-param
- Added defines for lpwr tables read  from vbios.
- HAL to support post init param which is require
  to setup clockgating interface in PMU & interfaces used during
  mscg state machine.
- gk20a_pmu_pg_global_enable() can be called when pg support
  required to enable/disable, this also checks & wait
  if pstate switch is in progress till it complets
- pg_mutex to protect PG-RPPG/MSCG enable/disable

JIRA DNVGPU-71

Change-Id: If312cefc888a4de0a5c96898baeaac1a76e53e46
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247554
(cherry picked from commit e6c94948b8058ba642ea56677ad798fc56b8a28a)
Reviewed-on: http://git-master/r/1270971
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-25 22:20:09 -08:00
Mahantesh Kumbar
75e52218ce gpu: nvgpu: PG engines init/allow/disallow update
- pmu_init_powergating loops & init multiple
  PG engines based on PG engines supported
- generalize pg init param HAL to support
  multiple PG-engine init based on PG engine
  parameter
- HAL's to return supported PG engines on chip &
  its sub features of engine.
- Send Allow/Disallow for PG engines which are
  enabled & supported.
- Added defines for pg engines

JIRA DNVGPU-71

Change-Id: I236601e092e519a269fcb17c7d1c523a4b51405f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247409
(cherry-picked from commit 1c138cc475bac7d3c3fbbd5fb18cfcb2e7fdf67a)
Reviewed-on: http://git-master/r/1269319
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-20 15:15:46 -08:00
Konsta Holtta
92fe000749 gpu: nvgpu: rename timeout_check to timeout_expired
Change "check" to "expired" in nvgpu_timeout_check* and append _expired
to nvgpu_timeout_peek to clarify what the boolean-like return value
means and thus avoid bugs.

Bug 200260715

Change-Id: I47e097ee922e856005a79fa9e27eddb1c8d77f8b
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1269366
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-19 15:40:36 -08:00
Vijayakumar
8ef013e36e gpu: nvgpu: handle vf curve change due to temp
JIRA DNVGPU-129

1)Add function hook for PMU VFE event handler which will do for VF
curve re-evaluation

2)Add function hook to send temperature limit of GPU sensor

3)Call VFE event handler from PMU's event handle function

Change-Id: I2e3577d3d895e97e6ad06e92f0f4827f9855d0b6
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1245393
(cherry picked from commit 1a5c6c32cdec73fb23735430f43577eda675e5af)
Reviewed-on: http://git-master/r/1268060
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-12-15 10:15:10 -08:00
Alex Waterman
4dc977e25f gpu: nvgpu: Use timeout API in PMU code
Instead of using custom code for timeout monitoring use the generic
timeout API for nvgpu.

Bug 1799159

Change-Id: If77e67b2d8678b824d6948620003d3892d5f41d2
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1255865
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-12-05 16:16:17 -08:00
Terje Bergstrom
d29afd2c9e gpu: nvgpu: Fix signed comparison bugs
Fix small problems related to signed versus unsigned comparisons
throughout the driver. Bump up the warning level to prevent such
problems from occuring in future.

Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252068
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-16 21:35:36 -08:00
Lakshmanan M
e580e68f23 gpu: nvgpu: fix sparse error
Issue:
warning: symbol 'pmu_allocation_get_fb_size_v3' was not declared.
Should it be static?

Fix:
Declare the 'pmu_allocation_get_fb_size_v3' as static

Bug 200067946

Change-Id: If93e074ecc041e33f91cb46913f6632bf32f48f0
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1250905
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-11-11 08:21:24 -08:00
seshendra Gadagottu
161b61e6cc gpu: nvgpu: pmu HAL update
Update pmu HAL to check for pmu support.
pmu initialization will check for pmu support in
that platform.

JIRA GV11B-21

Change-Id: Ib55be58a1540862b7a91a6162544d10be85b5eb4
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/1243911
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-11-01 11:36:51 -07:00
Alex Waterman
2fa54c94a6 gpu: nvgpu: Remove global debugfs variable
Remove a global debugfs variable and instead save the allocator
debugfs root node in the gk20a struct.

Bug 1799159

Change-Id: If4eed34fa24775e962001e34840b334658f2321c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1225611
(cherry picked from commit 1908fde10bb1fb60ce898ea329f5a441a3e4297a)
Reviewed-on: http://git-master/r/1242390
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-26 11:10:01 -07:00
Lakshmanan M
eca45ed722 gpu: nvgpu: Add proper memset size during cleanup
This CL covers the following small modifications,
1) Add proper memset size handling during pmu surface cleanup
2) Reset the pmu surface mem desc pointer after deallocate the memory

JIRA DNVGPU-47

Change-Id: I400f8c4d3f5dc650d4fc6669cef6a1e41a70f4ab
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1220100
(cherry picked from commit 1f171b977be51db20c2dfc56b3f6e3dd6b4b9095)
Reviewed-on: http://git-master/r/1240881
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-10-25 11:14:49 -07:00
Terje Bergstrom
697fe17dd6 gpu: nvgpu: Suppress error msg from VBIOS overlay
Suppress error message when nvgpu tries to load VBIOS overlay, but
one is not found. This situation is normal. This is done by moving
gk20a_request_firmware() to be nvgpu generic function
nvgpu_request_firmware(), and adding a NO_WARN flag to it.

Introduce also a NO_SOC flag to suppress attempt to load firmware
from SoC specific directory in addition to the chip specific
directory. Use it for dGPU firmware files.

Bug 200236777

Change-Id: I0294d3308f029a6a6d3c2effa579d5f69a91e418
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1223840
(cherry picked from commit cca44c3f010f15918cdd2259c15170ba1917828a)
Reviewed-on: http://git-master/r/1233353
GVS: Gerrit_Virtual_Submit
2016-10-09 13:03:35 -07:00
Vijayakumar
8de7ea2543 gpu: nvgpu: fix init msg param handing
bug 1809509

latest pmu now returns information about 3 queues
only. nvgpu pmu driver still support 5 queues to
be compatible with older firmware. handling this
properly

Change-Id: I4bc166712465f4b52537c97e6d254760c59e0d16
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1215533
(cherry picked from commit c7428c031a095b2d42512b7a8a0a9d818290e376)
Reviewed-on: http://git-master/r/1231040
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-10-07 01:36:04 -07:00
Vijayakumar
8b6eb6f118 gpu: nvgpu: fix sparse errors
bug 200067946

Change-Id: I50de1cda004c08b5a4af3fb06a3970c35197f419
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1230622
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2016-10-06 23:37:34 -07:00
Vijayakumar Subbu
b17d9708c9 gpu: nvgpu: Add dGPU clocks support
JIRA DNVGPU-45

Change-Id: I237ce81e31b036c05c82d46eea8694ffe1c2e3df
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205849
(cherry picked from commit 9a4006f76b75a8ad525e7aa5ad1f609aaae49126)
Reviewed-on: http://git-master/r/1227256
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-29 13:17:46 -07:00
Terje Bergstrom
27b47b1969 gpu: nvgpu: Use bitmap allocator for PMU DMEM
Switch from buddy to bitmap allocator for PMU DMEM. PMU DMEM is small
and we cannot allocate it sparsely.

JIRA DNVGPU-85

Change-Id: Ia23d25abab593fb0d92a2329d9878da7a72bc6ca
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1203974
(cherry picked from commit 78216c9d5f0974f94ce0f818db854ef08211d4e4)
Reviewed-on: http://git-master/r/1222682
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-27 13:22:43 -07:00
Vijayakumar
4ae85fd8c9 gpu: nvgpu: fix handling of return data in pmu messages
Irrespective generic MSG ptr, pick up data that PMU sends
as response to commands

JIRA DNVGPU-85

Change-Id: I97dd2abcd9e2a7ad7bfe1270f9905a5b69e196f3
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1205119
Reviewed-on: http://git-master/r/1205447
(cherry picked from commit b1130124157acb2cfb4d04a0dd6ee8c4c0c830e5)
Reviewed-on: http://git-master/r/1222684
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:34:21 -07:00
Vijayakumar Subbu
4894ebbda5 gpu: nvgpu: fix pmu msg and command queue init
Offset needs to be calculated for individual queues
from init ack content

Bug 200229814

Signed-off-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Change-Id: I93276b9cbab48e7fc42fb6c2a8edf382afb82f71
Reviewed-on: http://git-master/r/1202291
(cherry picked from commit 0e0abd478a13a5163e2b83d07307ed7136c4920e)
Reviewed-on: http://git-master/r/1205442
(cherry picked from commit f402cc2a9d0be05b5b95d5d0acbfc66f3b78b309)
Reviewed-on: http://git-master/r/1222683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:34:13 -07:00
Mahantesh Kumbar
3351916f56 gpu: nvgpu: update mclk support
- Update payload interface to support mclk
- Call mclk after gr init complete

JIRA DNVGPU-85

Change-Id: I14c5c6cb438f1a7d56d96daa0fafc09d6abef46b
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1205461
(cherry picked from commit f1bf1ec946aaacae40ecb405341eb2e169cf5754)
Reviewed-on: http://git-master/r/1217989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:33:56 -07:00
Mahantesh Kumbar
38e2722024 gpu: nvgpu: Vidmem support for PMU
Add vidmem support for PMU. Introduces pmu_surface, which abstracts
the memory used, and allocator helpers for both sysmem and vidmem.

JIRA DNVGPU-85

Change-Id: I61ce137c7007d82010e900759bf8acaf31fba286
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1196518
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1203125
(cherry picked from commit 665f5748108c50fe0c9b4c1486b9d74869477668)
Reviewed-on: http://git-master/r/1217628
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-18 23:33:47 -07:00
David Nieto
24c38aed59 gpu: nvgpu: fix pmu_copy_to_dmem spew
The error check was not taking account of
the DMEM address wrap-around

JIRA DNVGPU-34

Change-Id: Ibfed5532c3ee785b3061e6837f012939118a7ece
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: http://git-master/r/1206460
(cherry picked from commit 080953c20f91068ccaaa564d9492a1582ffa28fe)
Reviewed-on: http://git-master/r/1218297
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-09-12 16:06:44 -07:00
Terje Bergstrom
7d44a8d8d8 gpu: nvgpu: Support mclk initialization
Add ops for calling mclk initialization.

JIRA DNVGPU-85

Change-Id: I2e9da80fdb014d916b40513d605c38711818d2f6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1203975
(cherry picked from commit 9be482c4ece7ffc550ae19f133638c808b3a768f)
Reviewed-on: http://git-master/r/1217300
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2016-09-08 20:06:06 -07:00
Alex Waterman
b6569319c7 gpu: nvgpu: Support multiple types of allocators
Support multiple types of allocation backends. Currently there is
only one allocator implementation available: a buddy allocator.
Buddy allocators have certain limitations though. For one the
allocator requires metadata to be allocated from the kernel's
system memory. This causes a given buddy allocation to potentially
sleep on a kmalloc() call.

This patch has been created so that a new backend can be created
which will avoid any dynamic system memory management routines
from being called.

Bug 1781897

Change-Id: I98d6c8402c049942f13fee69c6901a166f177f65
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1172115
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2016-07-19 11:21:46 -07:00
Konsta Holtta
d33fb5a964 gpu: nvgpu: use vidmem by default in gmmu_alloc variants
For devices that have vidmem available, use the vidmem allocator in
gk20a_gmmu_alloc{,attr,_map,_map_attr}. For others, use sysmem.

Because all of the buffers haven't been tested to work in vidmem yet,
rename calls to gk20a_gmmu_alloc{,attr,_map,_map_attr} to have _sys at
the end to declare explicitly that vidmem is used. Enabling vidmem for
each now is a matter of removing "_sys" from the function call.

Jira DNVGPU-18

Change-Id: Ibe42f67eff2c2b68c36582e978ace419dc815dc5
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1176805
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-07-08 04:19:04 -07:00
Mahantesh Kumbar
7bd2329ab8 gpu: nvgpu: PMU version update
JIRA DNVGPU-34

Change-Id: Ib9618bdd928a02917b40e6f9619265bf27aa6879
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1162632
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-15 13:57:07 -07:00
Terje Bergstrom
3490cf9f2a gpu: nvgpu: Check result of gk20a_pmu_init
If PMU version is not supported, gk20a_pmu_init returns an error
code. Check the error code and fail poweron if gk20a_pmu_init
fails.

Change-Id: Ia1d6a6fcbcc5a144d2e5bc88734df778e887fa53
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1160371
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
2016-06-13 07:39:23 -07:00
Mahantesh Kumbar
b5f2cff023 gpu: nvgpu: update PMU version, interface & code
- update PMU interface/code to support
latest version of secure boot FW
- Add PMU FW version for next GPU support
- can_elpg check in pmu_setup_hw helps
  to fix queue error

JIRA DNVGPU-34

Change-Id: Iecf47fbc5b71cbf0f4bcdfeafad5c635cb6bff82
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1161107
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-09 16:55:23 -07:00
Lakshmanan M
6299b00beb gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
   for gm206 GPU family
5) Added generic mechanism to identify the
   CE engine pri_base address for gm206
   (CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
   made generic way
7) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:31:34 -07:00
Supriya
3d7263d3ca drivers: gpu: nvgpu: Update PMU version for gk20a
-T124 P4 Cl for the change 20824361
-P4 CL Removes accesses to ZBC L2 save/restore
-during ELPG

Bug 1746047
Bug 200204625

Change-Id: I5a52de7de51e723eae02f82c6c6fc9a213f9cd0e
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/1159464
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:07:26 -07:00
Mahantesh Kumbar
dc981a25f9 gpu: nvgpu; pmu version update
- P4 CL 20527959
- pmu version update for idle slowdown ucode
  CL http://git-master/r/#/c/1029404/
- configure LDIV slowdown factor to BY16
 using linear slowdown NV_THERM_FPDIV_BY16-0x1e value

Bug 200144583

Change-Id: Id15441a88ca980ab3f4f8a70e86cae5e59976829
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1159232
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-06 10:58:00 -07:00
Terje Bergstrom
1d2e66540a gpu: nvgpu: Fix calculation of timeout
Fix calculation of timeout in multiple places. The #defines
GR_IDLE_CHECK_DEFAULT and GR_IDLE_CHECK_MAX are meant to be used
only for defining the frequency of checking for timeout. Using them
for actual timeouts makes the timeout really short.

Change-Id: I3d0f8cbc91d619be8e5a9168ee1ab1d6298f129b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1158269
2016-06-05 20:44:19 -07:00
Mahantesh Kumbar
b6b7da6108 gpu: nvgpu: PMU support for gm204/gm206
Adding PMU modules to boot & comunicate
with PMU F/W

JIRA DNVGPU-11

Change-Id: I5afc9209f70fc13376268f9c94daef6b75527c71
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1156028
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-05 15:35:19 -07:00
Mahantesh Kumbar
ab458d0582 gpu: nvgpu: PMU interface's for gm204/gm206
Adding PMU interface's to support gm206/gm204

JIRA DNVGPU-11

Change-Id: I55671239cdb44804e7dd740d5e22a54e668005f4
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1155940
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-05 15:35:04 -07:00
Mahantesh Kumbar
f99de40936 gpu: nvgpu: WPR & PMU interface update
Update WPR interface &  PMU interface
to support latest ACR/PMU ucode versions

Change-Id: I4d1bd7a5c43751e96c1db58832cd316006d56954
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1158070
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-04 15:21:35 -07:00
Mahantesh Kumbar
4851d71e92 gpu: nvgpu: align DMA base in chip HAL method
align DMA base in chip HAL method instead
in generic method.

Bug N/A

Change-Id: I47a250380e083f393677b65c13d0c2c894214ca7
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1154909
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-27 08:24:17 -07:00
Mahantesh Kumbar
ed32288ee8 gpu: nvgpu: ELPG init based on flag
flag helps to enable/disable ELPG init in SW

Bug N/A

Change-Id: I73eb592b789c2c29db8a75018cbd1617dcf16df8
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1152430
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-26 16:07:33 -07:00
Mahantesh Kumbar
e9d5e7dfca gpu: nvgpu: secure boot HAL update
Updated/added secure boot HAL with methods
required to support multiple GPU chips.

JIRA DNVGPU-10

Change-Id: I343b289f2236fd6a6b0ecf9115367ce19990e7d5
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1151784
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-26 16:04:25 -07:00
Konsta Holtta
3e431e26c5 gpu: nvgpu: add PRAMIN support for mem accessors
To support vidmem, implement a way to access buffers via the PRAMIN
window instead of just kernel-mapped sysmem buffers for iGPU as of now.
Depending on the buffer aperture, choose between the two access types in
the buffer memory accessor functions.

vmap()/vunmap() pairs are no-ops for buffers that can't be cpu-mapped.

Two uses of DMA_ATTR_READ_ONLY are removed in the ucode loading path to
support writing to them too via the indirection in addition to cpu.

JIRA DNVGPU-23

Change-Id: I282dba6741c6b8224bc12e69c1fb3936bde7e6ed
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1141314
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-05-24 12:39:06 -07:00
Terje Bergstrom
72ae2dedf5 gpu: nvgpu: Add HAL op for PMU reset
Sequence to reset PMU is different for iGPU and dGPU. Specialize
and implement iGPU version.

Change-Id: I5b9ff2c018a736bc9e27b90d0942c52706b12a12
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1150540
2016-05-20 13:58:00 -07:00
Konsta Holtta
6eebc87d99 gpu: nvgpu: refactor gk20a_mem_{wr,rd} for vidmem
To support vidmem, pass g and mem_desc to the buffer memory accessor
functions. This allows the functions to select the memory access method
based on the buffer aperture instead of using the cpu pointer directly
(like until now). The selection and aperture support will be in another
patch; this patch only refactors these accessors, but keeps the
underlying functionality as-is.

gk20a_mem_{rd,wr}32() work as previously; add also gk20a_mem_{rd,wr}()
for byte-indexed accesses, gk20a_mem_{rd,wr}_n() for memcpy()-like
functionality, and gk20a_memset() for filling buffers with a constant.
The 8 and 16 bit accessor functions are removed.

vmap()/vunmap() pairs are abstracted to gk20a_mem_{begin,end}() to
support other types of mappings or conditions where mapping the buffer
is unnecessary or different.

Several function arguments that would access these buffers are also
changed to take a mem_desc instead of a plain cpu pointer. Some relevant
occasions are changed to use the accessor functions instead of cpu
pointers without them (e.g., memcpying to and from), but the majority of
direct accesses will be adjusted later, when the buffers are moved to
support vidmem.

JIRA DNVGPU-23

Change-Id: I3dd22e14290c4ab742d42e2dd327ebeb5cd3f25a
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1121143
Reviewed-by: Ken Adams <kadams@nvidia.com>
Tested-by: Ken Adams <kadams@nvidia.com>
2016-05-13 07:11:33 -07:00
Vijayakumar
701803d489 gpu: nvgpu: gm20b: update pmu ver
bug 1736601

PMU fixes ELPG residency calculation

Change-Id: I3fd802b582afe92627da218b7258ac8d307b1d30
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/1118262
(cherry picked from commit bda3a675b5463f021869015bbf628553ed422325)
Reviewed-on: http://git-master/r/1127491
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-15 12:40:48 -07:00
Gagan Grover
571c62d45e gpu: nvgpu: WARN_ON if NULL params in pmu_cmd_post
Don't need to BUG_ON. We can simply print kernel error message
along with call stack and return.

Bug 200182457

Change-Id: I06693f88372dfb5dd0dd2fae7630540594f302ba
Signed-off-by: Gagan Grover <ggrover@nvidia.com>
Reviewed-on: http://git-master/r/1115992
(cherry picked from commit f5cc88880e147f90d2cf9980db4322ee5fd613a6)
Reviewed-on: http://git-master/r/1117166
(cherry picked from commit ab0318b4a726886cd3e5ce97cf1a3bcaabab6171)
Reviewed-on: http://git-master/r/1119038
(cherry picked from commit 9b977073d11d7a1caa72994f750293b0e5076cef)
Reviewed-on: http://git-master/r/1127490
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-15 12:40:28 -07:00
Terje Bergstrom
9b5427da37 gpu: nvgpu: Support GPUs with no physical mode
Support GPUs which cannot choose between SMMU and physical
addressing.

Change-Id: If3256fa1bc795a84d039ad3aa63ebdccf5cc0afb
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120469
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
2016-04-13 13:12:41 -07:00
Terje Bergstrom
e8bac374c0 gpu: nvgpu: Use device instead of platform_device
Use struct device instead of struct platform_device wherever
possible. This allows adding other bus types later.

Change-Id: I1657287a68d85a542cdbdd8a00d1902c3d6e00ed
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120466
2016-04-08 09:42:41 -07:00
Supriya
bf82cd220a gpu: nvgpu: Add Fuse prints on PMU Halt
-Print fuse values in case of PMU halt error
-and mailbox reads 0xDEADDEAD

Bug 1737044

Change-Id: I59f5fcf4a69bdd2a2eea81a69dd99bb9c4c21e1d
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/1113464
(cherry picked from commit d0320eed72c5070c4fcc7564c02fa38599984751)
Reviewed-on: http://git-master/r/1120429
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-04-06 19:38:19 -07:00
Vishal Annapurve
cd29c45e67 gpu: nvgpu: Fix compilation with CONFIG_DEBUG_FS disabled
This change fixes issues with kernel compilation when
CONFIG_DEBUG_FS is disabled.

Bug 1737085

Change-Id: I74719674d07ae071e3df99b0dda249b54173f40b
Signed-off-by: Vishal Annapurve <vannapurve@nvidia.com>
Reviewed-on: http://git-master/r/1024167
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
2016-03-29 02:00:58 -07:00
Supriya
640cb6642f gpu: nvgpu: LRF, TEX, LTC, DRAM override
- Adding support for FECS mem overrides

Bug 1699676

Change-Id: I6c9ddcd98d57b29059513ee508c6f92b194c4fc7
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/921253
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-02-26 12:29:55 -08:00
Mahantesh Kumbar
0bade2cb45 gpu: nvgpu: pmu version update
- ucode CL http://git-master/r/#/c/935012/
- EXTERR exception for ZBC L2 regsiters access
  during ELPG entry/exit.
  FIX : ZBC L2 is not part of GR, so ZBC L2 rigsters
  save/restore not required for ELPG entry/exit,
  P4 CL 20360931
- 10 msec as GR_FECS_SUBMIT_METHOD_TIMEOUT_US, P4 CL 20313730
- keep disabled ELCG till Clear DAT_RESTORE
  interrupt at ELPG exit path, P4 CL 20313676

 Bug 1712507
 Bug 200166877

Change-Id: I2c9843cfd18cd3b513ee6587d1a79e7034b19cae
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/935019
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-01-21 09:29:05 -08:00
Terje Bergstrom
e469b21a1d gpu: nvgpu: ZBC update without idle
Do ZBC updates without forcing engine idle first.

Bug 1698013

Change-Id: I99218c8cfd02be05dace2003b8d91921765f7ca9
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/829145
2015-11-17 15:12:00 -08:00
Seshendra Gadagottu
95c52b55ad gpu: nvgpu: API for gpmu bootstrap
Expose API for gpmu bootstrap.

Bug 1685722

Change-Id: I46ca6f8b36e14cd1c6a12eb0d5cd178da2e0be1c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/812270
(cherry picked from commit bd7ac9992923cc32f2739926400bbf9b5cadc0c1)
Reviewed-on: http://git-master/r/813977
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-10-09 10:52:04 -07:00