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9 Commits

Author SHA1 Message Date
Divya Singhatwaria
b368dc48b3 gpu: nvgpu: Re-factor BIOS unit 
- Create nvlink_bios.c/.h files to separate out nvlink
  related bios code.
- Create bios_sw_<chip speciific>.c/.h files to separate
  out chips specific bios code.
- Create hal files for bios under hal/bios/ and move
  hardware specific code there.
- Move hardware accessing hal files from common/top
  to hal/top

JIRA NVGPU-2071

Change-Id: Ia466f1cd8947540b07b237e891312123df2c6b46
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107371
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-30 02:47:37 -07:00
rmylavarapu
6e67eec8d5 gpu:nvgpu: Restructure P-state unit 
Description:
Present p-state unit handle both pstate boardobj and
initializing all the units. As part of restructuring,
the pstate unit is separated into two units:
1) Perf_pstate: This unit will handle pstate boardobjs.
2) Pmu_pstate: This unit will initialize all the units
which supoort performance states.

Changes:
1) Created pmu_pstate unit.
2) Pstate boardobjs are moved under perf_pstate which
is under perf unit.

NVGPU-1958

Change-Id: I2c428adfe6de4992c9eeda0d4356d30290f6e8a4
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2096339
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-23 07:14:09 -07:00
Sagar Kamble
16953b9622 gpu: nvgpu: prepare pmu command unit 
pmu_ipc.c had functionality for rpc response handling and message cond
checks. This patch moves them to msg unit. And prepare cmd.h to group
together structs and functions related PMU commands.

JIRA NVGPU-1970

Change-Id: Iec5d72d02ab3ee51963631c828b301c56af8dc48
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079146
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:06:22 -07:00
Sagar Kamble
2250ccbe35 gpu: nvgpu: remove seq_desc parameter of pmu callbacks 
This parameter isn't used by the callbacks and plan is to keep
access to sequence struct members within IPC units.

JIRA NVGPU-1970

Change-Id: Idcdf4e8f493386be38a5c8a63a741ac06ce1b06e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079140
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:04:56 -07:00
Sagar Kamble
817e8f28c1 gpu: nvgpu: remove unneeded seq_desc and msg parameter of *_pmu_cmd_post functions 
These parameters are not required. Removing those will simplify the
refactoring of the IPC units.

JIRA NVGPU-1970

Change-Id: Id381ba18b87ea21860c05cad1fa64dad8e1a59a1
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079139
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:04:46 -07:00
Seema Khowala
a8587d5ee3 gpu: nvgpu: rename gr_idle_timeout_default to poll_timeout_default 
Rename gr_idle_timeout_default to poll_timeout_default

Rename NVGPU_DEFAULT_GR_IDLE_TIMEOUT to
NVGPU_DEFAULT_POLL_TIMEOUT_MS

Rename gk20a_get_gr_idle_timeout to nvgpu_get_poll_timeout

JIRA NVGPU-1313

Change-Id: I17314f0fa4a386f806f6940073649a9082ee21ad
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083130
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-28 16:07:45 -07:00
Philip Elcan
f6c012b39d gpu: nvgpu: lpwr: fix MISRA 10.3 violations 
MISRA Rule 10.3 prohibits implicit assignments of objects to different
size or essential type. This fixes a number of these issues in
common/pmu/lpwr.

JIRA NVGPU-1008

Change-Id: Ia9cc0609f8c923cff38c9f85c2920aa60a522923
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2017605
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-02-21 00:15:43 -08:00
Divya Singhatwaria
068341d27c gpu: nvgpu: Fix MISRA 16.1 violations 
Rule 16.1 states that all switch statements shall be well-formed:

- Every switch-clause will have default case.
- The switch-clause will end with an unconditional break statement.
- The switch statement will have two or more conforming switch clauses.

JIRA NVGPU-1509

Change-Id: I17ec54ba082d4a0e4464d9d4c4084d60e498f1a1
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1979627
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-01-22 03:04:11 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu 
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-01-10 20:09:55 -08:00