Commit Graph

282 Commits

Author SHA1 Message Date
Terje Bergstrom
8ca1a765ee gpu: nvgpu: Remove NVGPU_IOCTL_GET_BUFFER_INFO
The IOCTL was introduced for making efficient query of buffer
identity and size. It was never taken into use, and it adds a
dependency to Tegra specific dma_buf API, so remove it.

JIRA NVGPU-4

Change-Id: I194d7bb1f54997900a3be8d39c93331befa225c7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1648001
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-31 15:31:45 -08:00
Terje Bergstrom
f3f14cdff5 gpu: nvgpu: Fold T19x code back to main code paths
Lots of code paths were split to T19x specific code paths and structs
due to split repository. Now that repositories are merged, fold all of
them back to main code paths and structs and remove the T19x specific
Kconfig flag.

Change-Id: Id0d17a5f0610fc0b49f51ab6664e716dc8b222b6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1640606
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-22 22:20:15 -08:00
Aparna Das
47c794ab52 gpu: nvgpu: vgpu: add l3 allocation support
Modify rpc command parameter to support l3 cache
allocation.

Jira EVLR-1752

Change-Id: I1be00e04ee01c0763f46c0d0da6a112316cc7e1d
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1616566
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-12 13:26:41 -08:00
Richard Zhao
9dd3bb2e62 gpu: nvgpu: vgpu: move t19x specific code to general code
- remove vgpu_t19x.h and tegra_vgpu_t19x.h
- merge t19x specific ivc commands to the big enum
- move TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT to constants

Jira EVLR-2293

Change-Id: I34344bffa03bb69e1282b1f19382e3199f9ba105
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1636128
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-12 12:43:40 -08:00
Thomas Fleury
6b90684cee gpu: nvgpu: vgpu: get virtual SMs mapping
On gv11b we can have multiple SMs per TPC. Add sm_per_tpc in
vgpu constants to properly dimension the virtual SM to TPC/GPC
mapping in virtualization case.
Use TEGRA_VGPU_CMD_GET_SMS_MAPPING to query current mapping.

Bug 2039676

Change-Id: I817be18f9a28cfb9bd8af207d7d6341a2ec3994b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1631203
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-01-10 15:57:20 -08:00
Aparna Das
4f67a794dd gpu: nvgpu: vgpu: add io coherency support
Modify command message parameter to support io
coherency.

Jira EVLR-2025

Change-Id: I38b21c72d85f559555c4d97dab73d0f715ecc655
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1614388
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-12-30 18:50:40 -08:00
Richard Zhao
fa1b18c171 gpu: nvgpu: vgpu: add tsg release command
gv11b needs tsg release callback to release CE method buffer.

Bug 2022929

Change-Id: I32e27a5fa49eb61b9c2fc72ea32034191a9be48e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1611631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-12-10 10:36:39 -08:00
Terje Bergstrom
9d04e97093 gpu: nvgpu: Remove separation of t18x code
Remove separation of t18x specific code and fields and the associated
ifdefs. We can build T18x code in always.

Change-Id: I4e8eae9c30335632a2da48b418c6138193831b4f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595431
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-17 16:29:41 -08:00
Alex Waterman
35ae4194a0 gpu: nvgpu: Add translation for NVGPU MM flags
Add a translation layer to convert from the NVGPU_AS_* flags to
to new set of NVGPU_VM_MAP_* and NVGPU_VM_AREA_ALLOC_* flags.
This allows the common MM code to not depend on the UAPI header
defined for Linux.

In addition to this change a couple of other small changes were
made:

1. Deprecate, print a warning, and ignore usage of the
   NVGPU_AS_MAP_BUFFER_FLAGS_MAPPABLE_COMPBITS flag.
2. Move the t19x IO coherence flag from the t19x UAPI header
   to the regular UAPI header.

JIRA NVGPU-293

Change-Id: I146402b0e8617294374e63e78f8826c57cd3b291
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1599802
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-17 16:17:20 -08:00
Deepak Nibade
ba8dc31859 Merge remote-tracking branch 'remotes/origin/dev/linux-nvgpu-t19x' into linux-nvgpu
Bug 200363166

Change-Id: Ic662d7b44b673db28dc0aeba338ae67cf2a43d64
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2017-11-15 23:21:35 -08:00
Deepak Nibade
3ff666c4b9 gpu: nvgpu: deprecate TSG/CHANNEL_SET_PRIORITY IOCTLs
TSG/CHANNEL_SET_PRIORITY IOCTLs are deprecated and user space should be using
combination of timeslice and interleave levels to decide the priority

Hence remove the IOCTLs and all corresponding APIs

Jira NVGPU-393

Change-Id: I7cf0785689269536eca0c278c774b0e9e74f8c2f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1598581
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-15 08:46:09 -08:00
Thomas Fleury
738bee0373 gpu: nvgpu: vgpu: add vgpu_gv11b_tsg_bind_channel
Add TEGRA_VGPU_CMD_TSG_BIND_CHANNEL_EX command to pass subctx_id
and runqueu_sel to RM server. Use this command in gv11b's
implementation of gops->fifo.tsg_bind_channel.

Jira EVLR-1751

Change-Id: I8ba69c95ea1c6bb7fa106588b6420ed543b2386b
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579840
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-08 19:26:30 -08:00
Sami Kiminki
c22a5af913 gpu: nvgpu: Remove support for legacy mapping
Make NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL mandatory for all map
IOCTLs. We'll clean up the legacy kernel code in subsequent patches.

Remove support for NVGPU_AS_IOCTL_MAP_BUFFER. It has been superseded
by NVGPU_AS_IOCTL_MAP_BUFFER_EX.

Remove legacy definitions to nvgpu_map_buffer_args and the related
flags, and update the in-kernel map calls accordingly by switching to
the newer definitions.

Bug 1902982

Change-Id: Ie9a7f02b8d5d0ec7c3722c4481afab6d39b4fbd0
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560932
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-08 09:09:08 -08:00
Konsta Holtta
8bdce5337e gpu: nvgpu: support tuning per-ch deterministic opts
Add a new ioctl NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS to adjust
deterministic options on a per-channel basis. Currently, the only
supported option is to relax the no-railgating requirement on open
deterministic channels. This also disallows submits on such channels,
until the railgate option is reset.

Bug 200327089

Change-Id: If4f0f51fd1d40ad7407d13638150d7402479aff0
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1554563
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-06 12:27:35 -08:00
Deepak Goyal
730ba218c1 gpu: nvgpu: gv11b: Kernel iface for Dynamic TPC-PG
This patch adds kernel interface for dynamic TPC-PG feature.
User-space needs to send TPC-PG args to kernel via ioctl.

Dynamic TPC-PG feature will allow every context to specify the
number of TPC's it will use to run its workload.
This way, graphics driver can power off non-required TPC's
if a particular context has light to medium workload.

JIRA GPUT19x-16

Change-Id: Id4846245a6414b719599d04784cbe2ca5282f4ad
Signed-off-by: Deepak Goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575848
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-11-02 05:09:29 -07:00
Peter Daifuku
6bf40e5237 gpu: nvgpu: add max_css_buffer_size characteristic
Add max_css_buffer_size to gpu characteristics. In the virtual
case, the size of the cycle stats snapshot buffer is constrained
by the size of the mempool shared between the guest OS and the
RM server, so tools need to find out what is the maximum size
allowed.

In the native case, we return 0xffffffff to indicate
that the buffer size is unbounded (subject to memory availability),
in the virtual case we return the size of the mempool.

Also collapse native init_cyclestats functions to a single version,
as each chip had identical versions of the code.

JIRA ESRM-54
Bug 200296210

Change-Id: I71764d32c6e71a0d101bd40f274eaa4bea3e5b11
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578930
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-25 20:24:10 -07:00
Aparna Das
df4e88a21d gpu: nvgpu: vgpu: add support for gv11b syncpoints
In t19x, gv11b semaphore read and write operations are
translated to host1x syncpoint read and write operations
using semaphore syncpoint shim aperture. Implement relevant
vgpu hal functions for this in fifo hal.

Jira EVLR-1571

Change-Id: I6296cc6e592ea991e1c01bc9662d02fb063ff3c7
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1516367
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-24 01:26:17 -07:00
Sami Kiminki
5d09c908b0 gpu: nvgpu: Direct GMMU PTE kind control
Allow userspace to control directly the PTE kind for the mappings by
supplying NVGPU_AS_MAP_BUFFER_FLAGS_DIRECT_KIND_CTRL for MAP_BUFFER_EX.

In particular, in this mode, the userspace will tell the kernel
whether the kind is compressible, and if so, what is the
incompressible fallback kind. By supplying only the compressible kind,
the userspace can require that the map kind will not be demoted to the
incompressible fallback kind in case of comptag allocation failure.

Add also a GPU characteristics flag
NVGPU_GPU_FLAGS_SUPPORT_MAP_DIRECT_KIND_CTRL to signal whether direct
kind control is supported.

Fix indentation of nvgpu_as_map_buffer_ex_args header comment.

Bug 1705731

Change-Id: I317ab474ae53b78eb8fdd31bd6bca0541fcba9a4
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543462
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-09-15 15:45:45 -07:00
David Li
a199baede7 gpu: nvgpu: add NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST
NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST causes host to expire
current timeslice and reschedule from front of runlist.
This can be used with NVGPU_RUNLIST_INTERLEAVE_LEVEL_HIGH to make a
channel start sooner after submit rather than waiting for natural
timeslice expiration or block/finish of currently running channel.

Bug 1968813

Change-Id: I632e87c5f583a09ec8bf521dc73f595150abebb0
Signed-off-by: David Li <davli@nvidia.com>
Reviewed-on: http://git-master/r/#/c/1537198
Reviewed-on: https://git-master.nvidia.com/r/1537198
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-31 18:44:54 -07:00
Richard Zhao
0130c7ba43 gpu: nvgpu: vgpu: add num_pce to constants
Implement hal gops->ce2.get_num_pce.

Jira VFND-3797

Change-Id: Ie4fd3f170f2961ab5ebd1867b83bfda40e57aa2b
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543020
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 19:34:23 -07:00
Richard Zhao
0e0767672a gpu: nvgpu: vgpu: get engines info from RM server
- get engines info from constants
- remove according HAL from gp10b vgpu

Jira VFND-3797

Change-Id: If010e59c358ab0519cb0d8d6211c0bcc20fc3723
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1536179
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 19:34:22 -07:00
Richard Zhao
1ac8f6477d gpu: nvgpu: vgpu: add TEGRA_VGPU_ATTRIB_MAX_SUBCTX_COUNT
Get max subctx count from RM server.

Jira VFND-3797

Change-Id: I95de2271a77bedfa8703231fa45da05c7d2da3e6
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1543018
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-28 17:04:31 -07:00
David Nieto
de8e057f7e gpu: nvgpu: GV100 support
Adds support of GV100 up to devinit.

JIRA: EVLR-1693

Change-Id: Ic7aa5f1c20714e05954139f143abb6a3459858fc
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1532747
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-08-11 11:07:17 -07:00
Deepak Nibade
afa31cdd8c gpu: nvgpu: add support for L3 cache allocation of buffers
Add gv11b implementation of gpu_phys_addr() that checks the t19x
GMMU attributes struct to determine if L3 allocation should be
enabled. If L3 alloc is enabled then a special physical address
bit is set.

Add flag NVGPU_AS_MAP_BUFFER_FLAGS_L3_ALLOC to struct
nvgpu_as_map_buffer_ex_args so that User space can add a hint to
allocate buffer in L3 cache

Jira GPUT19X-10
Bug 200279508

Change-Id: I1bb9876a670b252980922aa50e3e69b802be137f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512602
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-07 07:05:39 -07:00
Deepak Nibade
d479a781c6 gpu: nvgpu: use coherent aperture for coherent buffers
Use sysmem_coherent aperture if the buffer mappings are requested
to be IO coherent. Use sysmem_noncoherent aperture otherwise. This
is implemented by adding a new coherent field to the GMMU attrs
struct.

Jira GPUT19X-17
Bug 1651331
Bug 200283998

Change-Id: I5cfb71b5913d4db50ebf10331b19f5a4216456bf
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1514438
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-07 07:05:38 -07:00
Deepak Nibade
8bdb74786c gpu: nvgpu: add characteristics flag to support IO coherence
Add a flag NVGPU_GPU_FLAGS_SUPPORT_IO_COHERENCE to nvgpu_gpu_characteristics
to indicate if IO coherence support is enabled on platform or not

Jira GPUT19X-17
Bug 1651331
Bug 200283998

Change-Id: Iba8fa797d6786bbc770ac45a3e39322f87be6e3f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master/r/1512599
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-07-07 07:05:38 -07:00
seshendra Gadagottu
6d758eb81b gpu: nvgpu: gv11b: support for full subcontext
Changes to enable 64 subcontexts: 1 SYNC + 63 ASYNC
Currently all subcontexts with in a tsg can have only
single address space.

Add support for NVGPU_TSG_IOCTL_BIND_CHANNEL_EX for
selecting subctx id by client.

Bug 1842197

Change-Id: Icf56a41303bd1ad7fc6f2a6fbc691bb7b4a01d22
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1511145
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-07-05 15:40:25 -07:00
seshendra Gadagottu
3afac13d66 gpu: nvgpu: add support for t19x tsg/channel
Required modifications to add t19x channel
specific info and handle t19x tsg requests.

Bug 1842197

Change-Id: I0f8bcce20edea8f2f9a01e5bf5a9e4181af54875
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master/r/1511144
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-07-05 15:40:24 -07:00
Richard Zhao
6a25181882 gpu: nvgpu: vgpu: add basic t19x HALs
- Added t19x vgpu platform data
- Added basic vgpu HAL for gv11b.
- Added subctx header HAL.

Jira VFND-3796

Change-Id: I2b99364801b41d042b53e057f1a30e1194f354c3
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474729
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-29 22:34:37 -07:00
Richard Zhao
28093a374b gpu: nvgpu: vgpu: add t19x support
- add commit_inst hal ops
- add t19x cmds to cmd big union
- add t19x vgpu driver and call t19x hal init
- get guest channel_base to calculate hw channel id

Jira VFND-3796

Change-Id: Ic2431233fd174afc2c84c4794e20552e6e88b1dc
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1474715
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-29 22:34:36 -07:00
Richard Zhao
7d584bf868 gpu: nvgpu: rename hw_chid to chid
hw_chid is a relative id for vgpu. For native it's same as hw id.
Renaming it to chid to avoid confusing.

Jira VFND-3796

Change-Id: I1c7924da1757330ace715a7c52ac61ec9dc7065c
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master/r/1509530
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-29 22:34:35 -07:00
Peter Daifuku
f7e37e6847 gpu: nvgpu: vgpu: perfbuffer support
Add vgpu support for ModeE perfbuffers

- VM allocation is handled by the kernel, with final mapping
  handled by the RM server
- Enabling/disabling the perfbuffer is handled by the RM server

Bug 1880196
JIRA EVLR-1074

Change-Id: Ifbeb5ede6b07e2e112b930c602c22b66a58ac920
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master/r/1506747
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-27 15:44:11 -07:00
Samuel Payne
102c512082 gpu: nvpgu: Use correct chipid
Add gm20b "B" revision chipip.

Bug 1870669

Change-Id: Ife31e6d739aabb8ef4a4f401091c3202b415a70e
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1490650
Reviewed-by: Samuel Payne <spayne@nvidia.com>
Signed-off-by: Samuel Payne <spayne@nvidia.com>
Reviewed-on: http://git-master/r/1490648
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-23 15:54:12 -07:00
Sachit Kadle
4d88952760 gpu: nvgpu: vgpu: add freq capping support
Currently callbacks from the PM_QOS framework (for
thermal events), result in a RPC call to set GPU frequency.

Since the governor will now be responsible for setting desired
rate, the max PM_QOS callback will now cap the possible
GPU frequency w/ a new RPC call to the server. The server
is responsible for setting the ultimate frequency
based on the cap & desired rates.

Jira VFND-3699

Change-Id: I806e309c40abc2f1381b6a23f2d898cfe26f9794
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295543
(cherry picked from commit e81693c6e087f8f10a985be83715042fc590d6db)
Reviewed-on: http://git-master/r/1282467
(cherry picked from commit 7b4e0db647572e82a8d53e823c36b465781f4942)
Reviewed-on: http://git-master/r/1321836
(cherry picked from commit 57dafc08a5)
Reviewed-on: http://git-master/r/1313469
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-19 16:36:26 -07:00
Sachit Kadle
b3a7c2b305 gpu: nvgpu: vgpu: add devfreq support
Add devfreq governor support in order to allow frequency scaling
in virtualization config. GPU clock frequency operations are
re-directed to the server over RPC.

Bug 200237433

Change-Id: I1c8e565a4fff36d3456dc72ebb20795b7822650e
Signed-off-by: Sachit Kadle <skadle@nvidia.com>
Reviewed-on: http://git-master/r/1295542
(cherry picked from commit d5c956fc06697eda3829c67cb22987e538213b29)
Reviewed-on: http://git-master/r/1280968
(cherry picked from commit 25e2b3cf7cb5559a6849c0024d42c157564a9be2)
Reviewed-on: http://git-master/r/1321835
(cherry picked from commit f871b52fd3)
Reviewed-on: http://git-master/r/1313468
Tested-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-06-19 16:36:26 -07:00
Konsta Holtta
8dc75c1725 gpu: nvgpu: only support TSC time correlation info
Remove the two other unnecessary options based on jiffies and
gettimeofday, leaving only the time stamp counter clocksource.

Jira NVGPU-83

Change-Id: I289951aba832eda36cb9cb68b7e41e6061ec3a03
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1503000
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
2017-06-19 10:45:29 -07:00
Thomas Fleury
741e5c4517 gpu: nvgpu: hal for timestamps correlation
In order to perform timestamps correlation for FECS
traces, we need to collect GPU / GPU timestamps
samples. In virtualization case, it is possible for
a guest to get GPU timestamps by using read_ptimer.
However, if the CPU timestamp is read on guest side,
and the GPU timestamp is read on vm-server side,
then it introduces some latency that will create an
artificial offset for GPU timestamps (~2 us in
average). For better CPU / GPU timestamps correlation,
Added a command to collect all timestamps on vm-server
side.

Bug 1900475

Change-Id: Idfdc6ae4c16c501dc5e00053a5b75932c55148d6
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1472447
(cherry picked from commit 56f56b5cd9)
Reviewed-on: http://git-master/r/1489183
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-15 11:53:10 -07:00
Konsta Holtta
f6c921ec97 gpu: nvgpu: bring back tegra idle registration
To make do_idle work when nvgpu is built as a module, reverse the order
of call dependencies for do_idle. Don't provide visible
gk20a_do_{idle,unidle}() functions for the kernel but instead call the
kernel for registering and unregistering pointers to them when the
driver loads and unloads.

Refactor the internal __gk20a_do_{idle,unidle} functions to take a
struct gk20a * instead of struct device *, and use the callback api for
providing that g instead of retrieving the plat device from device tree.

Bug 200290850

Change-Id: Ibef8b069302e547b298069cbb97734f461a10cc3
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1493774
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-15 05:23:19 -07:00
Konsta Holtta
7680fd689e gpu: nvgpu: hold power ref for deterministic channels
To support deterministic channels even with platforms where railgating
is supported, have each deterministic-marked channel hold a power
reference during their lifetime, and skip taking power refs for jobs in
submit path for those.

Previously, railgating blocked deterministic submits in general because
of gk20a_busy()/gk20a_idle() calls in submit path possibly taking time
and more significantly because the gpu may need turning on which takes a
nondeterministic and long amount of time.

As an exception, gk20a_do_idle() can still block deterministic submits
until gk20a_do_unidle() is called. Add a rwsem to guard this. VPR resize
needs do_idle, which conflicts with deterministic channels' requirement
to keep the GPU on. This is documented in the ioctl header now.

Make NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING always
set in the gpu characteristics now that it's supported. The only thing
left now blocking NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_FULL is
the sync framework.

Make the channel debug dump show which channels are deterministic.

Bug 200291300
Jira NVGPU-70

Change-Id: I47b6f3a8517cd6e4255f6ca2855e3dd912e4f5f3
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1483038
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-06-14 16:33:32 -07:00
Richard Zhao
914bb78a7d gpu: nvgpu: vgpu: move TEGRA_VGPU_ATTRIB_PREEMPT_CTX_SIZE to constants
Also removed deprecated TEGRA_VGPU_ATTRIB_*, but leave a place holder
in case someone wants to use this command in future.

Jira VFND-3796

Change-Id: Ic36a59db238d276b0e3dd68a9d8ec5834a04333d
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1457497
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-06-09 14:55:12 -07:00
Seema Khowala
c3192b5acc gpu: nvgpu: use mmu_fault_info struct for legacy gpu chips
Removed fifo_mmu_fault_info_gk20a struct to use
new mmu_fault_info struct

JIRA GPUT19X-7
JIRA GPUT19X-12

Change-Id: I1987ff1b07e7dbdbee58d7e5f585faacf4846e54
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1487240
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-05-30 11:04:05 -07:00
Thomas Fleury
b03afb6d5c gpu: nvgpu: add ioctls to get current timeslice
Add the following ioctls
- NVGPU_CHANNEL_IOCTL_GET_TIMESLICE for channel timeslice in us
- NVGPU_TSG_IOCTL_GET_TIMESLICE for TSG timeslice in us

If timeslice has not been set explicitly, ioctl returns the
default timeslice that will be used when programming the runlist
entry.

Bug 1883271

Change-Id: Ib18fdd836323b1a2d4efceb1e27d07713bd6fca5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: http://git-master/r/1469040
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-24 04:55:36 -07:00
Aparna Das
85ff2a31eb gpu: nvgpu: vgpu: use ivm to send auxiliary data
RM server retrieves auxiliary data only from IVM.
Modify IVC commands to send auxiliary data to RM
server using IVM and not as a part command message.

VFND-4166

Change-Id: I9bfe33cf9301f7c70709318b810c622ec57b1cdf
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: http://git-master/r/1484130
Reviewed-by: svcboomerang <svcboomerang@nvidia.com>
Tested-by: svcboomerang <svcboomerang@nvidia.com>
2017-05-24 03:47:30 -07:00
Konsta Holtta
ee9733e587 gpu: nvgpu: expose deterministic submit support
Add these bits in the gpu characteristics flags:

NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING - fast
submits with no in-kernel job tracking are supported.

NVGPU_GPU_FLAGS_SUPPORT_DETERMINISTIC_SUBMIT_FULL - deterministic
submits also with job tracking and num_inflight_jobs set are supported.

Either of these may get disabled if the particular channel or submit
still requires features that block these.

Make gk20a_channel_sync_needs_sync_framework() take a gk20a pointer
instead of a channel pointer so that it can be called without a channel.
It does not need any per-channel data.

Bug 200291300

Change-Id: I5f82510b6d39b53bcf6f1006dd83bdd9053963a0
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1456845
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-05-05 07:54:18 -07:00
Terje Bergstrom
7665421874 gpu: nvgpu: Replace use of bitops.h and kernel.h
Remove use of linux/kernel.h and linux/compiler.h. We don't use
anything in those headers.

Also replace use of linux/bitops.h with new wrapper nvgpu/bitops.h.

JIRA NVGPU-13

Change-Id: Iefa6b4598d5a5e7fc386c0a7a554e778a87010d6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1460777
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
2017-04-12 07:01:12 -07:00
Konsta Holtta
1a4647272f gpu: nvgpu: remove fence dependency tracking
In preparation for better abstraction in job synchronization, drop
support for the dependency fences tracked via submit pre-fences in
semaphore-based syncs. This has only worked for semaphores, not nvhost
syncpoints, and hasn't really been used. The dependency was printed in
the sync framework's sync pt value string.

Remove also the userspace-visible gk20a_sync_pt_info which is not used
and depends on this feature (providing a duration since the dependency
fence's timestamp).

Jira NVGPU-43

Change-Id: Ia2b26502a9dc8f5bef5470f94b1475001f621da1
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/1456880
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-11 09:57:21 -07:00
Richard Zhao
3429657f93 gpu: nvgpu: vgpu: merge tegra_vgpu_t18x.h to tegra_vgpu.h
No need to keep two vgpu headers anymore.

Jira VFND-3796

Change-Id: I400cbfa5b2c0e62963eff247adcd9483be975379
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: http://git-master/r/1457480
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-04-07 13:48:30 -07:00
Peter Daifuku
fd02ab4d54 gpu: nvgpu: vgpu: profiler reservation support
Support for hwpm reservations in the virtual case:

- Add session ops for checking and setting global and context reservations, and
  releasing reservations
- in the native case, these just update reservation counts and flags
- in the vgpu case, when the reservation count is 0, check with the RM server
  that a reservation is possible: for global reservations, no other guest
  can have a reservation; for context reservations, no other guest can have
  a global reservation
- in the vgpu case, when the reservation count is decremented to 0, notify
  the RM server that the guest no longer has any reservations

Bug 1775465
JIRA VFND-3428

Change-Id: Idf115b730e465e35d0745c96a8f8ab6b645c7cae
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1323375
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-24 09:08:17 -07:00
Seema Khowala
17df192180 gpu: nvgpu: gr faults: do not depend on fake mmu fault notifier
Currently NVGPU_CHANNEL_FIFO_ERROR_MMU_ERR_FLT is being set in
error notifier for non mmu fault too. For fake mmu faults i.e.
trigger mmu fault cases, make sure proper notifiers are set and
driver is not depending on sending mmu error fault notifier.
This change is needed for t19x fifo recovery too.

NVGPU_CHANNEL_GR_ERROR_SW_METHOD (12), NVGPU_CHANNEL_GR_EXCEPTION(13)
and NVGPU_CHANNEL_FECS_ERR_UNIMP_FIRMWARE_METHOD (37) are new error
notifiers.

JIRA GPUT19X-7

Change-Id: Idee83e842c835bdba9eb18578aad0c372ea74c5d
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1310563
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-23 17:18:28 -07:00
Peter Daifuku
23e92bee4a gpu: nvgpu: profiler create/free, hwpm reserve
Add support for creating/freeing profiler objects, hwpm reservations

Bug 1775465
JIRA EVLR-680
JIRA EVLR-682

Change-Id: I4db83d00e4b0b552b05b9aae96dc553dd1257d88
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1294401
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-03-22 19:46:40 -07:00