Instead of depending on clock frame-work, use platform data
for ptimer source rate. Removed ptimerscaling10x platform
data, and use ptimer source frequency to calculate
ptimerscaling factor.
Reviewed-on: http://git-master/r/819030
(cherry picked from commit dd291334d54dab80cab7eb1656dffc48a59610b4)
Change-Id: I7638ce9875a6e440bbfc2ba2da0d0b094b2700ff
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/827300
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add new IOCTL NVGPU_IOCTL_TSG_SET_PRIORITY to allow
setting timeslice for entire TSG
Return error from channel specific IOCTL_CHANNEL_SET_PRIORITY
if the channel is part of TSG
Separate out API gk20a_channel_get_timescale_from_timeslice()
to get timeslice_timeout and scale from timeslice period
Use this API to get timeslice_timeout and scale for TSG and
store it in tsg_gk20a structure
Then trigger runlist update so that new timeslice values
will be re-written to runlist for TSG
Bug 200146615
Change-Id: I555467d034f81b372b31372f0835d72b1c159508
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/824206
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add IOCTL NVGPU_DBG_GPU_IOCTL_TIMEOUT to support
disabling/re-enabling scheduler timeout from user space
If user space application is closed without re-enabling
the timeouts, kernel will restore the timeouts' state
while releasing the debug session
This is needed for debugging purpose
Bug 1514061
Change-Id: I32efb47ad09d793f3e7fd8f0aaa9720c8bc91272
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/788176
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Get rid of the duplicate gpfifo struct to emphasize the fact that
nvgpu_gpfifo is the only memory layout for gpfifo entries that works.
This is the same layout that HW uses.
Also, add a local pointer to the gpfifo memory in
gk20a_submit_channel_gpfifo to get rid of repeated typecasts.
Bug 1592391
Bug 1550886
Change-Id: I5432859ef8e7c1aab5907e44098994d7bb807f50
Signed-off-by: Janne Hellsten <jhellsten@nvidia.com>
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/677341
(cherry picked from commit 724c8c6228af81dd440e825bddf545dd6b2b8bd7)
Reviewed-on: http://git-master/r/822548
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Arto Merilainen <amerilainen@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
In gk20a_do_idle(), if can_railgate = false, we do
reset_assert() on the GPU
But asserting reset might have dependencies on
specific h/w seqeunce for ensuring proper reset
Hence avoid calling reset_assert() and directly
call platform specific unrailgate() and railgate()
APIs which take care of the correct reset sequence
Bug 200142989
Bug 200137963
Bug 1678611
Change-Id: Ide886dd88b8422ad36de52d54378b1edd9c7bbd6
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/820322
(cherry picked from commit d621ddd49da976a75c14aa7aaa37f700fb4e83f2)
Reviewed-on: http://git-master/r/822515
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Currently we unrailgate the GPU if railgating is not enabled
or pm_domains are not enabled
But in case if railgating is not enabled and pm_domains
are enabled, we explicitly unrailgate GPU in gk20a_pm_init()
and then runtime PM unrailgates it again when first user
space request arrives - setting unrailgate refcount to 2
Now for gk20a_do_idle(), we need to railgate the GPU in
fist call but that does not happen since unrailgate
refcount != 1
hence, in case railgating is not enabled, we should
unrailgate the GPU from only one place i.e. when first user
space request arrives
Bug 200142989
Bug 200137963
Bug 1678611
Reviewed-on: http://git-master/r/820321
(cherry picked from commit 452a1ff8da8e3f47caed2371440f9ad150bf8699)
Change-Id: Ic9fe2267c9df5629315c30c1404c2b3044c1265a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/822296
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
At zcull bind we disable whole GR engine. This is unnecessary, so
instead disable only the channel and make sure it's unloaded.
Introduces also an API in fifo_gk20a.c to do the channel disable.
gr_gk20a_ctx_zcull_setup() was always passed true as last parameter,
so remove parameter.
Change-Id: I7ae6e101ec7d1ab3f6ee4e9bcc442d23dbd21247
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/787570
Protect creation and deletion of sync by an own mutex. This prevents
deadlock in channel abort when abort is called from submit path.
Bug 200147887
Change-Id: I5d6308b773c1d1a6a89d4590e2e74c74d691f79d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/821127
Program clock slowdown to happen using gradual slowdown. It is
significantly faster than the default slowdown.
Change-Id: I9e5259889637fce2c0b083a424b54af12bb45c25
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/819698
Take a channel ref when handling a notification from
the server, to prevent the channel from being closed.
Also, mark the channel as faulted before calling
g20a_channel_abort, to keep the semantics the same
as the native driver.
Bug 1653186
Change-Id: I0cb8ce7bad22a4d508eade6ff63a412296a02fc9
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/811885
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/817021
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Always use the PROD value for FE_GO_IDLE_TIMEOUT.
Change-Id: I455c03ae07b35a8999cd0995e458c421a10e7ca2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/813958
Trigger recovery on DS and MEMFMT HWW errors, and write an error line
to UART for each HWW error.
Also capture the channel id before clearing the exception.
Bug 1683059
Change-Id: Ia00d88a76371a4bd7e047915dde0bf0d4b84bc10
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/816983
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
When we induce a fake MMU fault, we do not have pointer to a channel.
Use the tsg pointer instead. Also remove the error print in case we
do not have ch pointer.
Change-Id: I14fd75d2b743244915bf32fe39de76097ef5c42f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/819034
In gk20a_fifo_handle_sched_error(), we currently cancel
the timeout on all the channels
But this could cause us to miss one of stuck channel
hence, instead of cancelling, restart the timeout of channel
on which it is already active
Bug 200133289
Change-Id: I40e7e0e5394911fc110ab6fde39592b885dfaf7d
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/816133
Reviewed-by: Ishan Mittal <imittal@nvidia.com>
Tested-by: Ishan Mittal <imittal@nvidia.com>
In gk20a_channel_timeout_stop(), we take the channel's
timeout lock and then cancel the timeout worker thread
Timeout worker thread also tries to acquire same timeout
lock.
Hence, while cancelling the timeout in gk20a_channel_timeout_stop()
if the timeout_handler is already scheduled, we will have a deadlock
Fix this by moving cancel_delayed_work_sync() out of the locks
Bug 200133289
Bug 1695481
Change-Id: Iea78770180b483a63e5e176efba27831174e9dde
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/815922
Reviewed-by: Ishan Mittal <imittal@nvidia.com>
Tested-by: Ishan Mittal <imittal@nvidia.com>
To handle any of the pbdma interrupt, we currently write zero
to pbdma_method0 and then clear the interrupt
But this is insufficient since we cannot use same intr clear
method for all the interrupts
Hence, add intr specific routines to handle those interrupts
NV_PPBDMA_INTR_0_PBENTRY:
- fix the pb_header to have a null opcode
- fix the pbdma_method to have a valid nop
NV_PPBDMA_INTR_0_METHOD:
- fix the pbdma_method to have a valid nop
NV_PPBDMA_INTR_0_DEVICE:
- fix the pb_header to have a null opcode
- go through all pbdma_method0/1/2/3
-- if they contain host s/w methods, replace those
methods with a valid NOP
Bug 200134238
Change-Id: I10c284a6cdc1441f9d437cea65aae00d3c33a8c8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/814561
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Currently, if can_railgate = false, then we have below
sequence to allocate secure_page
- unrailgate GPU (forever)
- reset_assert()
- allocate secure_page
- reset_deassert()
But if we allocate secure page even before unrailgating GPU
for first time, then we can avoid reset_assert()/deassert()
calls since GPU should already be in reset/railgated at
boot time
hence, rework this sequence as below
- init required mutex, set platform->reset_control
- allocate secure page (GPU should already be in reset
at this point)
- gk20a_pm_init() which unrailgates GPU in case of
can_railgate = false
Bug 200137963
Bug 1678611
Change-Id: I79d0543bb5cf1eaf1009e1e6ac142532d84514a5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/797153
(cherry picked from commit 368004501943d38c003747f6bec0384fed57ee65)
Reviewed-on: http://git-master/r/816005
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Return immediately in case there are no buffers to put. This skips
acquiring mutexes and map batch start/finish overheads.
Bug 1614735
Bug 1623949
Bug 1660392
Change-Id: Ief04e36d995e65c1510496c17cb3f5bb90486c69
Signed-off-by: Sami Kiminki <skiminki@nvidia.com>
Reviewed-on: http://git-master/r/815376
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This reverts commit aeb74fc7952718ffab6281c687951499510c4333.
User space was fixed not to send zero-length GPFIFO entries.
Bug 1662670
Change-Id: Iec6bf1870a19db4e8daa2ed4512650b92a37ba92
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/811783
A SCHED error might cause multiple channels' watchdogs to trigger
simultaneously
Hence, to avoid this conflict cancel watchdog timeout on all
channels before recovering from SCHED errors
Also, define API gk20a_channel_timeout_stop_all_channels()
to cancel wdt timeout on all channels
Bug 200133289
Change-Id: I8324c397891f0a711327b77d0677cd6718af6d01
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/810959
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
We have another constant timeout of 5s for channel watchdog.
Hence drop default channel timeout (used for SCHED errors)
to 3s so that they both don't conflict with each other
Bug 200133289
Change-Id: Ieed675cad462119ff2f1a155a955c8a22cb6c6f8
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/810958
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Channel watchdog timeout is set to a costant value of 5s
as of now
Make this timeout platform specific and set it to 5s for gm20b
and 7s for gk20a
Bug 200133289
Change-Id: I6e7f0fed93a8d5b197ae46807131311196c6636f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/810956
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
While loading the context, erstwhile set CDE flag was being
overwritten by copying code of golden context, thus losing
the information. This was not letting the CDE info reach
to the ucode, and T1 was not configured to 128B mem access.
Bug 200096226
Change-Id: I5ceb234a62450ff7875aeba05ec616758cb319d9
Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/811767
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
bug 1603226
host based timeouts use ptimer for detecting
timeouts. on gk20a and gm20b ptimer runs 2.6x
slower. scale the fifo_eng_timeout to account
for this
Change-Id: Ie44718382953e36436ea47d6e89b9a225d5c2070
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/799983
(cherry picked from commit d1d837fd09ff0f035feff1757c67488404c23cc6)
Reviewed-on: http://git-master/r/808250
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
bug 1688374
disabling pmu will break RAM suspend on chips implementing
split rails. pmu will be powered down along with rest of
the GPU anyway. pmu_destroy is not be used outside of
rail gating or gpu suspend
Change-Id: I9e89859b7c701f731276ae1d1063d9ccd88d4334
Signed-off-by: Vijayakumar <vsubbu@nvidia.com>
Reviewed-on: http://git-master/r/805940
(cherry picked from commit 8ded353878ff7df73e55b702041008ddc3cbf069)
Reviewed-on: http://git-master/r/808248
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add CPU dcache flush after populating scatterBuffer so that the GPU
will see the buffer contents.
Bug 1679453
Change-Id: I564394ed1fcff4d08d753e753bd3243b460d76df
Signed-off-by: Jussi Rasanen <jrasanen@nvidia.com>
Reviewed-on: http://git-master/r/805197
(cherry picked from commit d6a5513745aa77c84ac5408a62f72f24839ef439)
Reviewed-on: http://git-master/r/808246
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
The server now exposes a new GMMU map interface that
can accept a scatter-gather list. This is needed to support
SMMU-bypass configurations.
Bug 1677153
JIRA VFND-689
Change-Id: I7b5af145db57dcebe2c9125ec90c689798d7e69e
Signed-off-by: Aingara Paramakuru <aparamakuru@nvidia.com>
Reviewed-on: http://git-master/r/792558
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: Vladislav Buzov <vbuzov@nvidia.com>
It is possible that user space requests more unmaps on a buffer
than it requested maps
In this case, we end up dropping one extra refcount which could
lead to releasing buffer early
Fix this by checking and returning if buffer's user_mapped
refcount is already zero
Bug 200130521
Change-Id: Ic8ef2dbfe0476b16d852ad899b1ed0404b5bb7de
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/788904
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
