Commit Graph

12 Commits

Author SHA1 Message Date
Richard Zhao
9b66fca165 gpu: nvgpu: move .exec_regops to only execute regops
HAL .exec_regops used to first validate regops then execute it, now
moving it to only execute the regops.

- It helps B0CC on HV. On server side it does not track profiler object,
but regops validation uses the profiler, so moving validation to client
side.
- The change also remove ctx_buffer_offset checking in
validate_reg_op_offset. The offset already checked again whitelists
which have be verified when update whitelist. Also vgpu does not have
information of ctx and golden image.
- Added function nvgpu_regops_exec to cover both regops validation and
execution.

Jira GVSCI-10351

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: I434e027290e263a8a64a25a55500f7294038c9c4
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2534252
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2021-06-08 01:29:40 -07:00
Mayur Poojary
6277d57936 gpu: nvgpu: Add new api for setting longer timeslice on dbg node
Add new ioctl api for setting longer timeslice and get timeslice
inside 'dbg' dev node.
Update ioctl gpu_get_characteristic to pass the max timeslice value
Add debugfs to access and change the max timeslice value

Bug 1842244

Change-Id: I7e80f59162cf5d90496f9752fc128f5fa8dcc7d2
Signed-off-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2471569
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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2021-04-06 04:37:38 -07:00
Deepak Nibade
869735cda4 gpu: nvgpu: add dynamic allowlist support
Add gv11b and tu104 HALs to get allowed  HWPM resource register ranges,
offsets, and stride meta data.

Add new enum nvgpu_pm_resource_hwpm_register_type for HWPM register
type. Add new struct nvgpu_pm_resource_register_range_map to store all
the register ranges for HWPM resources. Add pointer of map in struct
nvgpu_profiler_object along with map entry count.

Add new API nvgpu_profiler_build_regops_allowlist() to build the regops
allowlist dynamically while binding the resources. Map entry count is
received with get_pm_resource_register_range_map_entry_count() and only
those resource ranges are added for which resource is reserved by
profiler object.

Add nvgpu_profiler_destroy_regops_allowlist() to destroy the allowlist
while unbinding the resources.

Add static functions allowlist_range_search() to search a register
offset in HWPM resource ranges. Add another static function
allowlist_offset_search() to search the offset in per-resource offset
list.

Add nvgpu_profiler_validate_regops_allowlist() that accepts an offset
value, checks if it is in allowed ranges using allowlist_range_search()
and then checks if offset is in allowlist using allowlist_offset_search().

Update gops.regops.exec_regops() to receive profiler object pointer as
a parameter.

Invoke nvgpu_profiler_validate_regops_allowlist() from
validate_reg_ops() if prof pointer is not-null. This will be true only
for new profiler stack and not legacy profilers.

In gr_exec_ctx_ops(), skip regops execution if offset is invalid.

Bug 2510974
Jira NVGPU-5360

Change-Id: I40acb91cc37508629c83106ea15b062250bba473
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2460001
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Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
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GVS: Gerrit_Virtual_Submit
2021-01-05 12:38:06 -08:00
Deepak Nibade
6daa0636d1 gpu: nvgpu: rework regops execution API
Rework regops execution API to accomodate below updates for new
profiler design

- gops.regops.exec_regops() should accept TSG pointer instead of
  channel pointer.
- Remove individual boolean parameters and add one flag field.

Below new flags are added to this API :
NVGPU_REG_OP_FLAG_MODE_ALL_OR_NONE
NVGPU_REG_OP_FLAG_MODE_CONTINUE_ON_ERROR
NVGPU_REG_OP_FLAG_ALL_PASSED
NVGPU_REG_OP_FLAG_DIRECT_OPS

Update other APIs, e.g. gr_gk20a_exec_ctx_ops() and validate_reg_ops()
as per new API changes.

Add new API gk20a_is_tsg_ctx_resident() to check context residency
from TSG pointer.

Convert gr_gk20a_ctx_patch_smpc() to a HAL gops.gr.ctx_patch_smpc().
Set this HAL only for gm20b since it is not required for later chips.
Also, remove subcontext code from this function since gm20b does not
support subcontext.

Remove stale comment about missing vGPU support in exec_regops_gk20a()

Bug 2510974
Jira NVGPU-5360

Change-Id: I3c25c34277b5ca88484da1e20d459118f15da102
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2389733
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2020-12-15 14:13:28 -06:00
Deepak Nibade
08308bc936 gpu: nvgpu: rework pm resource reservation system
Current PM resource reservation system is limited to HWPM resources
only. And reservation tracking is done using boolean variables.

New upcoming profiler support requires reservation for all the PM
resources like SMPC and PMA stream. Using boolean variables is
not scalable and confusing. Plus the variables have to be replicated
on gpu server in case of virtualization.

Remove flag tracking mechanism and use list based approach to track
all PM reservations. Also, current HALs are defined on debugger object.
Implement new HALs in new pm_reservation object since it is really an
independent functionality.

Add new source file common/profiler/pm_reservation.c which implements
functions to reserve/release resources and to check if any resource
is reserved or not.
Add common/vgpu/pm_reservation_vgpu.c for vGPU which simply forwards
the request to gpu server.

Define new HAL object gops.pm_reservation and assign above functions
to below respective HALs :
g->ops.pm_reservation.acquire()
g->ops.pm_reservation.release()
g->ops.pm_reservation.release_all_per_vmid()

Last HAL above is only used for gpu server cleanup of guest OS.

Add below new common profiler functions that act as APIs to reserve/
release resources for rest of the units in nvgpu.
nvgpu_profiler_pm_resource_reserve()
nvgpu_profiler_pm_resource_release()

Initialize the meta data required for reservtion system in
nvgpu_pm_reservation_init() and call it during nvgpu_finalize_poweron.
Clean up the meta data before releasing struct gk20a.

Delete below HALs :
g->ops.debugger.check_and_set_global_reservation()
g->ops.debugger.check_and_set_context_reservation()
g->ops.debugger.release_profiler_reservation()

Bug 2510974
Jira NVGPU-5360

Change-Id: I4d9f89c58c791b3b2e63099a8a603462e5319222
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2367224
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2020-12-15 14:13:28 -06:00
Deepak Nibade
d869040d7a gpu: nvgpu: rename profiler object structure
Rename profiler object structure from struct dbg_profiler_object_data
to struct nvgpu_profiler_object.

Annotate the structure members appropriately.

Bug 2510974

Change-Id: I9454388f8ad143b39daca6bbc2b12511ffa3fd95
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2365675
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2020-12-15 14:13:28 -06:00
Deepak Nibade
e4e6be85ea gpu: nvgpu: move profiler alloc/free APIs to separate file
Move profiler object allocation/free APIs to separate profiler
specific file common/profiler.c.

Store struct gk20a pointer in struct dbg_profiler_object_data for
convenience of accessing global struct pointer.

Update profiler object to store TSG pointer instead of channel
pointer. Since expectations is to have one profiler object
per context/TSG.

nvgpu_profiler_reserve_acquire() has a case to check if resource
reservation is acquired by some other channel in TSG.
But now since we keep track of TSG itself, this case becomes
redundant and can be removed.

All the support is compiled out of safety build with compile
flag CONFIG_NVGPU_PROFILER.
Linux will always compile the support.

Bug 2510974

Change-Id: I197bbd67a9cdd1fbea42f1effd1b74b15a6068e5
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2365674
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2020-12-15 14:13:28 -06:00
Debarshi Dutta
17486ec1f6 gpu: nvgpu: rename tsg_gk20a and channel_gk20a structs
rename struct tsg_gk20a to struct nvgpu_tsg and rename struct
channel_gk20a to struct nvgpu_channel

Jira NVGPU-3248

Change-Id: I2a227347d249f9eea59223d82f09eae23dfc1306
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112424
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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2019-05-06 02:56:53 -07:00
Aparna Das
012f46ef74 gpu: nvgpu: vgpu: create common ivc unit
Move ivc comm related functions to ivc/comm_vgpu.c.
These functions call os specific ivc counterparts.

Jira GVSCI-334

Change-Id: I886dddb71c43975cb83a3508005ab1136b7adadc
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2082183
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2019-04-04 13:26:23 -07:00
Philip Elcan
191aeb5cf8 gpu: nvgpu: regops: u32 num_ops for exec_regops
The exec_regops() API was using a u64 for the num_ops parameter. The
lower level APIs used by exec_regops() expect u32s for this value.
Update the interface to use u32.

This eliminates MISRA Rule 10.3 violations for assignment of objects of
different essential or narrower types.

JIRA: NVGPU-3023

Change-Id: I5a2a22916f81d8b3d882d224d07eedffcde1e3ee
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2084207
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2019-04-01 15:55:14 -07:00
Aparna Das
56e37a7059 gpu: nvgpu: vgpu: move vgpu perf functions to new file
Move vgpu functions vgpu_perfbuffer_enable() and vgpu_perfbuffer_disable()
to a new file perf_vgpu.c and create corresponding header files.

Jira: GVSCI-334

Change-Id: Icbb0fc3e222e2ab431696420a86b2600f214c948
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011761
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2019-02-19 13:35:23 -08:00
Aparna Das
3a2ec0c075 gpu: nvgpu: vgpu: rename dbg_vgpu files to debugger_vgpu
Rename dbg_vgpu files to debugger_vgpu following native
file layout.

Also fix violations of lines over 80 chars in debugger_vgpu.c
and debugger_vgpu.h

Jira GVSCI-334

Change-Id: Ib950420f4b654cb6f581ffc3576b18904aef00f0
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011760
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2019-02-19 13:35:14 -08:00