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37 Commits

Author SHA1 Message Date
rmylavarapu
700bd83b41 gpu: nvgpu: Rename/clean boardobj unit 
-Removed unwanded boardobj includes
-Renamed functions as struct as per usage

NVGPU-4484

Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Change-Id: I792a4b64075d5e87f911c1073717dbe7107227a1
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335991
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
rmylavarapu
8e545ef04b gpu: nvgpu: Fix boardobj allocation size 
In current implementation we are allocating boardobj
in nvgpu_boardobj_construct_super for all units and assigning
that pointer to boardobj type, as the size differe for different
units assigning the boardobj pointer to a common type will
give violations. Fixing them by allocating mem a head
and later call construct_super for elements initialization.

NVGPU-4484

Change-Id: I9b5ed1a6d8418fec48a29eee38d55fc7d83fcfab
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335989
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
rmylavarapu
0115c26f1b gpu: nvgpu: Boardobj lite unit refactor 
As boardobj unit is used only in PMU, the plan is to move
all the boardobj related functions/structures and Macros
to boardobj specific folders. This will remove unnecessary
usage of boardobj outside PMU.

NVGPU-4484

Change-Id: I9f0fda32e6affd1fce218eb0ac638a9dfc8b99c3
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2335986
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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GVS: Gerrit_Virtual_Submit
 2020-12-15 14:13:28 -06:00
rmylavarapu
dc32307c13 gpu: nvgpu: Rename therm public struct 
Renamed therm public struct to match with the other
units.

NVGPU-4449

Change-Id: I675ce43b136139420b8cc1eecdc395d9165d9f30
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2307090
Reviewed-by: Automatic_Commit_Validation_User
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 2020-12-15 14:13:28 -06:00
rmylavarapu
aa20b36597 gpu: nvgpu: Refactor Therm unit 
-Created ucode_therm_inf.h header to include all
interface struct and macros from pmuif folder
-Removed thrmpmu.c/.h files and moved all those
functions into thrm.c file
-Renamed functions into public/private format

NVGPU-4449

Change-Id: I8015679351648e94b2d8dd22548c727294b4ddcb
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286333
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 2020-12-15 14:13:28 -06:00
rmylavarapu
7f09ad1be8 gpu: nvgpu: Add therm device to support VBIOS .95 
Latest POR VBIOS have TSOSC/SCI therm device in
therm device table. PMU ucode doesn't support these
device, so NVGPU need not send the config data to
PMU. Adding support in NVGPU to skip these boardobj
entries.

NVBUG-200569668

Change-Id: I64ccd1f7f8c4e545369134fd2ca5bb76561ffc8f
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2247690
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2020-12-15 14:10:29 -06:00
rmylavarapu
86ab9c2ebc gpu: nvgpu: Remove support of unused therm devices 
Current auto profile support only GPU therm device
only. Support for other device is not needed and removed.

NVGPU-4360

Change-Id: I48ce80674b6c60903b60bc4ee571938ec5e332df
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241539
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
d23ad1d829 gpu: nvgpu: Remove unused therm event 
Currently for every +/-5 degC change in
temperature, PMU internally evaluate VF curve on
temp change and will send VFE callback to NVGPU for
initiating change seq to program voltage and frequency.
This is the only callback we receive on temp change
which we handle in perf unit, and we don't have any
other temp events raised by PMU.
So, deleting the therm event handler.

NVGPU-4360

Change-Id: I3c7279dcf691135c178b6a05766403a935bc7e73
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241488
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
d363348a88 gpu: nvgpu: Remove unsused code in therm unit 
- Remove unused functions
- Removed rpc command handlers functions
- Removed therm cmd structs
- Removed unused macros

NVGPU-4360

Change-Id: I7e74d024bbad31634e67005cd6f3ae94c040f3f0
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2241394
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:10:29 -06:00
rmylavarapu
65a7896987 nvgpu: gpu: Implement PMU therm channel get status 
Currently nvgpu reads the temperature by reading the
NV_THERM_I2CS_SENSOR_00 register. Below are the issues
with current approach
    1) NV_THERM_I2CS_SENSOR_00 doesn't support
       fractional precision which is POR.
    2) It doesn't support negative temperatures which
       is required for Auto.
    3) It doesn't take into account the right POR
       sensor in VFE VBIOS tables.

From therm channel get status interface we can read the
current temperature from PMU.

NVBUG - 200549047

Change-Id: I2fb21926208876f3d3bebe3f2dee08edafedbc7d
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2196224
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2020-12-15 14:10:29 -06:00
Ramesh Mylavarapu
375fd13eb8 Revert "Revert "nvgpu: gpu: Changes in therm_channel table parsing"" 
This reverts commit 33b031ed0513c379d93cdc1084c6724189dfbb80.

Change-Id: I1f260ed518d7b00c1ce65f0af9f47fd64ff66b33
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194825
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
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 2020-12-15 14:05:52 -06:00
Ramesh Mylavarapu
98e6f68ccf Revert "Revert "nvgpu: gpu: Add boardobj class_ids to all units"" 
This reverts commit 29179624564c7fe538fef89708fd1b54a6e612ba.

Change-Id: Ic3dca94106cfea0c77cff07597545c4d6c8166c0
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194823
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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 2020-12-15 14:05:52 -06:00
Prabhu Kuttiyam
53a58c9bb4 Revert "nvgpu: gpu: Add boardobj class_ids to all units" 
This reverts commit 0d3a489de0fbb67fb70a7431b6073f248384f6cf.

Change-Id: I23bda44bf6e933d5c2f62ec025c48eb76215857a
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194528
Reviewed-by: Akshatha Somayaji <asomayaji@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
 2020-12-15 14:05:52 -06:00
Prabhu Kuttiyam
8847de07bf Revert "nvgpu: gpu: Changes in therm_channel table parsing" 
This reverts commit f68de065d6b8fddcc26fd539f6223f78acaf5b89.

Change-Id: Iaad268ef61186b0c78828cdad05e69b3799bdd40
Signed-off-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2194527
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Akshatha Somayaji <asomayaji@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
 2020-12-15 14:05:52 -06:00
rmylavarapu
f14d9a36b7 nvgpu: gpu: Changes in therm_channel table parsing 
-As auto profile support only GPU class therm devices,
we need to have a check in therm channel tables to parse
only GPU class device table.

NVGPU-4008

Change-Id: I2bade2899e43659f754879ed635cf1ead17b3386
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2191526
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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 2020-12-15 14:05:52 -06:00
rmylavarapu
5756924a8b nvgpu: gpu: Add boardobj class_ids to all units 
- Class_ids of all the units has been changed in safety
PMU ucode, this CL will have the updated class_ids of all
units.
NVGPU-4007

Change-Id: Ic109b5140840da64f903be6b3de88c5d948b3d1c
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2191523
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2020-12-15 14:05:52 -06:00
rmylavarapu
3e2e1e9fcf gpu: nvgpu: Remove TSOSC and SCI sensor support 
On r435 safety branch, TSOSC and SCI sensor support is disabled for
TU10a profile. Done changes on NVGPU to support the same.

NVGPU-3776

Change-Id: I6bf8f267a3030e574a30ac01a9a7462ba47bd017
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2153116
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Tested-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
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 2019-07-29 05:28:58 -07:00
Sagar Kadamati
77051a8c86 gpu: nvgpu: compiled out non-safe devctls 
The following DEVCTLs not needed in safety build
Compiled out below DEVCTLs for safety build

 * NVGPU_GPU_DEVCTL_SET_THERM_ALERT_LIMIT
 * NVGPU_GPU_DEVCTL_GET_TPC_EXCEPTION_EN_STATUS
 * NVGPU_GPU_DEVCTL_GET_CPU_TIME_CORRELATION_INFO

Also added config flag CONFIG_NVGPU_IOCTL_NON_FUSA

JIRA NVGPU-3768

Change-Id: Ia233d0aac8201268524581f588d97390a913ab9c
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2159398
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 2019-07-26 13:27:22 -07:00
Divya Singhatwaria
20fcf813dd gpu: nvgpu: Use sw ops for BIOS 
Some functions are not accessing hardware directly
but are being called using HAL ops: For example

.init = gv100_bios_init,
.preos_wait_for_halt = gv100_bios_preos_wait_for_halt,
.preos_reload_check = gv100_bios_preos_reload_check,
.devinit = gp106_bios_devinit,
.preos = gp106_bios_preos,
.verify_devinit = NULL,

This was being called as:
g->ops.bios.init(g)
g->ops.bios.preos_wait_for_halt(g)
g->ops.bios.preos_reload_check(g)
g->ops.bios.preos(g)
g->ops.bios.devinit(g)
g->ops.bios.verify_devinit(g)

Change the function access by using sw ops, like:
Create new function: nvgpu_bios_sw_init()
and based on hardware chip call the chip specific
bios sw init function: nvgpu_gv100_bios_sw_init()
and nvgpu_tu104_bios_sw_init()to assign the sw
ops

JIRA NVGPU-2071

Change-Id: Ibfcd9b225a7bc184737abdd94c2e54190fcd90a0
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2108526
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-28 02:05:43 -07:00
Mahantesh Kumbar
3d1169544f gpu: nvgpu: alloc space for PMU's struct nvgpu_pmu at runtime 
Allocating space for struct nvgpu_pmu at run time as part of
nvgpu_pmu_early_init() stage and made required changes to
dependent fiels as needed.

JIRA NVGPU-1972

Change-Id: I2d1c86d713e533c256ba95b730aa2e9543a66438
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110109
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-05-23 00:56:55 -07:00
Abdul Salam
b6b1af387d gpu: nvgpu: Add pmu as argument for all therm functions 
Add struct nvgpu_pmu as argument for all therm functions.
This will help in unit testing of public functions in therm unit.

Jira NVGPU-3216

Change-Id: Icf48c68bacda2f65dfaa9578f46c0a588c683ed4
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2113641
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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 2019-05-09 09:23:47 -07:00
Abdul Salam
bba7a89be4 gpu: nvgpu: Move therm_pmu from gk20a to nvgpu_pmu 
The aim is to have single pmu structure inside gk20a, that is nvgpu_pmu
struct and all the global structures of all units in PMU should be 
included in nvgpu_pmu struct.

Jira NVGPU-3216

Change-Id: Idc8c6c73514049809cfbde4ca6c1ad75688a5b80
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2112732
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 2019-05-07 02:02:54 -07:00
Abdul Salam
bc10ef568e gpu: nvgpu: Restructure boardobjgrpmask unit 
This patch does the following for boardobjgrpmask unit.
1. Remove unused functions and its pointers.
2. Append public functions with nvgpu.
3. Remove unnecessary inclusion of header files.
4. Make local functions as static.
5. Rename function names to increase readibility.
6. Remove boardobj* from static functions.

Jira NVGPU-1977

Change-Id: Ie6d3bd8f55784d29ae4ba720fb3998487ad2b942
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107167
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2019-04-29 11:04:46 -07:00
Mahantesh Kumbar
04e3d37523 gpu: nvgpu: fix build error due to nvgpu_pmu_handle_therm_event 
On TOT, nvgpu_pmu_handle_therm_event() causing build error
as therm.h header file is removed from pmu_msg.c file.

Change-Id: I3b016084db8cfa35e4bfda8432fad438bf36d3a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2098640
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
 2019-04-16 09:49:15 -07:00
Mahantesh Kumbar
df7d80beb1 gpu: nvgpu: move therm code from pmu_gk20a.c to therm unit 
As part of PMU HAL separation, need to move non-HAL code to respective
UNIT & found still some therm code left in pmu_gk20a.c files which
needs to be moved therm UNIT.

JIRA NVGPU-2002

Change-Id: I44fe5e9b0966bb508307a6323e09e1edd59aff02
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2089871
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 2019-04-16 02:54:32 -07:00
Abdul Salam
d03b0c9f43 gpu: nvgpu: Remove circular dependency between 
therm and pmu

This patch does the following
1. Use function pointers to access therm event handler from pmu.
2. Remove therm.h header include.
3. Assign the pointer during SW setup of therm.

Jira NVGPU-1959

Change-Id: Ib52810d85765480626791e4e3f442110d343eed9
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2094322
Tested-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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 2019-04-15 20:53:43 -07:00
Sagar Kamble
bcbc87dc2e gpu: nvgpu: move pmu interface headers to include/nvgpu/pmu 
Interface header files for PMU features are now moved under PMU header
files directory include/nvgpu/pmu. And fix bulk of coding style issues.
Update header file names and guards.

JIRA NVGPU-1971

Change-Id: Idf53fc09d8928d1b0a1cd16eef886de010dae06b
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093006
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-13 12:33:52 -07:00
Sagar Kamble
16953b9622 gpu: nvgpu: prepare pmu command unit 
pmu_ipc.c had functionality for rpc response handling and message cond
checks. This patch moves them to msg unit. And prepare cmd.h to group
together structs and functions related PMU commands.

JIRA NVGPU-1970

Change-Id: Iec5d72d02ab3ee51963631c828b301c56af8dc48
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079146
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:06:22 -07:00
Sagar Kamble
b8b02885af gpu: nvgpu: add rpc handlers for therm, volt, perfmon and acr 
RPC handlers for therm, volt, perfmon and acr were open coded in the
pmu_rpc_handler. Instead, add implementations to respective units.
To avoid the dereferncing of struct nvgpu_pmu to avoid the circular
dependency we pass gk20a struct as input to nvgpu_pmu_rpc_execute
and other pmu_ipc.c functions.

JIRA NVGPU-1970

Change-Id: I6ea046960936923e69242bf90e8e25958cfba85e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079145
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:06:07 -07:00
Sagar Kamble
2250ccbe35 gpu: nvgpu: remove seq_desc parameter of pmu callbacks 
This parameter isn't used by the callbacks and plan is to keep
access to sequence struct members within IPC units.

JIRA NVGPU-1970

Change-Id: Idcdf4e8f493386be38a5c8a63a741ac06ce1b06e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079140
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:04:56 -07:00
Sagar Kamble
817e8f28c1 gpu: nvgpu: remove unneeded seq_desc and msg parameter of *_pmu_cmd_post functions 
These parameters are not required. Removing those will simplify the
refactoring of the IPC units.

JIRA NVGPU-1970

Change-Id: Id381ba18b87ea21860c05cad1fa64dad8e1a59a1
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2079139
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-04-05 05:04:46 -07:00
Seema Khowala
a8587d5ee3 gpu: nvgpu: rename gr_idle_timeout_default to poll_timeout_default 
Rename gr_idle_timeout_default to poll_timeout_default

Rename NVGPU_DEFAULT_GR_IDLE_TIMEOUT to
NVGPU_DEFAULT_POLL_TIMEOUT_MS

Rename gk20a_get_gr_idle_timeout to nvgpu_get_poll_timeout

JIRA NVGPU-1313

Change-Id: I17314f0fa4a386f806f6940073649a9082ee21ad
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2083130
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-28 16:07:45 -07:00
Philip Elcan
538c5cbe7b gpu: nvgpu: therm: fix MISRA 10.3 violations 
Fix MISRA Rule 10.3 violations in common/pmu/therm for assigning
objects of different size or essential type.

JIRA NVGPU-1008

Change-Id: I1b940515192e9c976927dae30ba466ca885297de
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027656
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-03-07 11:44:15 -08:00
Abdul Salam
c7702ab5ff gpu: nvgpu: Restructure common.pmu.therm unit 
This patch does the following.
1. Remove include of HW header files in common.
2. Append public functions with nvgpu.

Jira NVGPU-1959

Change-Id: Ibd60620e9db14b52d49577b899b2d2077b5a544a
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019236
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-02-21 21:56:23 -08:00
Philip Elcan
0a0d866400 gpu: nvgpu: therm: update type for size param 
Update interfaces to use size_t to align with boardobj_construct_super()
and avoid unnecessary casts.

JIRA NVGPU-1008

Change-Id: I5aac3483ed5080bf633ba564e8684db425c50a22
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011437
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
Reviewed-by: Scott Long <scottl@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-02-11 14:04:36 -08:00
Philip Elcan
64f87e9584 gpu: nvgpu: pmu: fix return in thrm api 
The api therm_domain_pmu_setup() in thrm.c was return a u32 incorrectly.
It should return an int.

JIRA NVGPU-1008

Change-Id: I1cf51f26fc2615671bbab4dcf78b4f60b7bdcbeb
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1995883
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-01-18 13:54:49 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu 
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
 2019-01-10 20:09:55 -08:00