Terje Bergstrom
d1331bd07d
gpu: nvgpu: gp10b: Implement SetCoalesceBufferSize
...
Implement method for setting the coalesce buffer size at runtime.
Bug 1681992
Change-Id: Ice6c00a27f642c2d68d6cd0e30c12df2e48f5374
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/802366
(cherry picked from commit bd763bc8a16b80ccc8f79b2229eccf2fe2417611)
Reviewed-on: http://git-master/r/808239
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:08 +05:30
Kirill Artamonov
3b08d73568
gpu: nvgpu: gp10b: add debug features for gfxp and cilp
...
Add debugfs switch to force cilp and gfx preemption
Add debugfs switch to dump context switch stats on channel
destruction.
bug 1525327
bug 1581799
Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com >
Change-Id: I7d0558cc325ce655411388ea66ad982101f2fe66
Reviewed-on: http://git-master/r/794976
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com >
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/677231
2016-12-27 15:22:07 +05:30
Robert Morell
e7ab0321d3
gpu: nvgpu: gp10b: Correct C097_SET_GO_IDLE_TIMEOUT offset
...
Bug 1678603
Change-Id: I1c2c3c9395e068fabf554779ded6f0f536622c90
Signed-off-by: Robert Morell <rmorell@nvidia.com >
Reviewed-on: http://git-master/r/792831
Reviewed-on: http://git-master/r/806187
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com >
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com >
2016-12-27 15:22:07 +05:30
Terje Bergstrom
c54ebdd78a
gpu: nvgpu: gp10b: Implement NVC0_SET_GO_IDLE_TIMEOUT
...
Bug 1678603
Change-Id: Ib8fb09dace864567b1ce574c216a584831723684
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/790402
Reviewed-on: http://git-master/r/806185
2016-12-27 15:22:07 +05:30
Terje Bergstrom
4493b6b200
gpu: nvgpu: gp10b: Enable CILP mode for compute
...
Allow enabling CILP for compute. Set CTA by default.
Bug 1517461
Change-Id: I85cc931b810afb3ee6116de1200d01b52e1bc29e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/661298
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:03 +05:30
Terje Bergstrom
15839d4763
gpu: nvgpu: Implement gp10b context creation
...
Implement context creation for gp10b. GfxP contexts need per channel
buffers.
Bug 1517461
Change-Id: Ifecb59002f89f0407457730a35bfb3fe988b907a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/660236
2016-12-27 15:22:03 +05:30
Terje Bergstrom
e5161d1518
gpu: nvgpu: gp10b: Implement SW methods
...
Bug 1567274
Change-Id: I6d760eca7ac0931847f9a04a9d4a408519ade511
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/654098
2016-12-27 15:22:02 +05:30
Kenneth Adams
16c511220e
gpu: nvgpu: t18x, gp10b framework
...
This change adds gp10b to the nvgpu build as
well as enabling CMA for buffer allocation.
Change-Id: Id3d45ad6ffdab14120395952e68b285dd7364c76
Signed-off-by: Ken Adams <kadams@nvidia.com >
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com >
Reviewed-on: http://git-master/r/553324
GVS: Gerrit_Virtual_Submit
2016-12-27 15:22:02 +05:30
