o emc clock scaling (bug fix):
Take the gpu load into account for gpu frequencies less
than or equal to fmax @ Vmin.
Bug 1591643
Change-Id: I0298adfdd4b7111557907c3bd6022fd6005355f0
Signed-off-by: Anders Kugler <akugler@nvidia.com>
Reviewed-on: http://git-master/r/735846
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reduce amount of duplicate code around memory allocation by using
common helpers, and common data structure for storing results of
allocations.
Bug 1605769
Change-Id: I10c226e2377aa867a5cf11be61d08a9d67206b1d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/720507
o emc clock scaling
Only take the gpu load into account for gpu frequencies below
fmax @ Vmin.
The granularity of frequency steps is much larger in the gpu
frequency range below fmax @ Vmin than in the upper frequency range.
Above fmax @ Vmin, keep the gpu unblocked and disregard the gpu load
when evaluating the emc target.
o tegra_postscale()
Round the new emc target to nearest discrete frequency.
Set the emc frequency only if the new emc target is different
from the previously requested emc frequency to avoid the penalty
of the locks inside clk_set_rate().
Bug 1591643
Change-Id: I1a1a8734a74569c4d57b6e2bda4c11b2bda3f5f3
Signed-off-by: Anders Kugler <akugler@nvidia.com>
Reviewed-on: http://git-master/r/680937
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Ilan Aelion <iaelion@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
First, defining a new structure to support gk20a
power domain. Then making necessary modifications
to add so as to add DT support for gpu power-domain.
bug 200070810
Change-Id: I29e1c24b181e14743d3969103abfd1882d171f07
Signed-off-by: Sumit Singh <sumsingh@nvidia.com>
Reviewed-on: http://git-master/r/668973
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Add "force_reset" flag to __gk20a_do_idle()
For real world use cases like VPR resizing, we cannot wait
for railgate_delay (which is 500 mS). Hence use CAR reset
for this use case. (this is done via gk20a_do_idle() API
with force_reset = true)
Some of the test cases make use of sysfs "force_idle" and
they expect GPU to be into really railgated state and
not in CAR reset.
Hence when called from sysfs, set force_reset = false.
When global flag "force_reset_in_do_idle" is set, it will
override local flags and force CAR reset case.
This is desired in cases where railgating is not enabled
Also, set force_reset_in_do_idle = false for GM20B since
railgating has been enabled for GM20B
Bug 1592997
Change-Id: I6c5af2977c7211ef82551a86a7c1eb51b8ccee60
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/711615
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
gm20b has more channels than sync points. We use aggressive reclaim
of sync points to offset that. Disable aggressive reclaim for gk20a
because it is not needed there.
Bug 1583849
Change-Id: I2a74b0504150a54cb8a97016effe20c5d905ac95
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/657095
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Add ->remove() for undoing the ->probe() and ->late_probe() in
gk20a_platform devices, and call it when gk20a is removed.
Bug 1476801
Change-Id: Ic9b29c0a7ea4a4cae7b5a0f66774bd799eb28434
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/594443
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
In gk20a_do_idle(), we wait for platform->railgate_delay
to allow GPU to go into rail gate
But sometimes we set platform->railgate_delay = INT_MAX
to disable GPU rail gating but allow it to suspend during
low power state
Due to this, force_idle API fails (it waits for INT_MAX)
To fix this, allow forcing CAR reset instead of rail gating
with flag "force_reset_in_do_idle" defined in gk20a_platform
Set this flag for gm20b until we fix the railgate_delay
Bug 1517584
Change-Id: I031aa56f87d4db3727e2c3a3e5eeaf18503dd449
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/593704
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Fix below sparse warnings :
warning: Using plain integer as NULL pointer
warning: symbol <variable/funcion> was not declared. Should it be static?
warning: Initializer entry defined twice
Also, remove dead functions
Bug 1573254
Change-Id: I29d71ecc01c841233cf6b26c9088ca8874773469
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/593363
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
To assert reset on GPU, we store "gpu_ref" clock in
platform->clk[0] and use it to assert/deassert reset
But for gm20b, "gpu_ref" is no longer resettable.
To fix this, add two callbacks in gk20a_platform :
.reset_assert and .reset_deassert
Also, add a pointer "clk_reset" to store the clock
which needs to be reset
For gk20a specific implementation, we continue to
reset platform->clk[0]
For gm20b specific implementation, we first request
"gpu_gate" clock, store it and use it to assert reset
Bug 1513685
Bug 1517584
Change-Id: I15a583a4a07eb663b442084be8b8c7d0c7c7a142
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
CONFIG_GK20A_CDE has not even been used for enabling CDE, just for
initializing it at boot time, and it was disabled; initialization has
been done late when the engine is first used. Remove the config
setting and add information about CDE support in gk20a platform data,
forcing the initialization at boot time. Boot time init removes rare
race conditions when CDE would be initialized by first user.
Bug 200046882
Change-Id: I85d5fb73dc27acbbe203138d25f6e342de030d93
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/562855
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Implement support for 64kB large page size. Add an API to create an
address space via IOCTL so that we can accept flags, and assign one
flag for enabling 64kB large page size.
Also adds APIs to set per-context large page size. This is possible
only on Maxwell, so return error if caller tries to set large page
size on Kepler.
Default large page size is still 128kB.
Change-Id: I20b51c8f6d4a984acae8411ace3de9000c78e82f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
gpu rail gating reference count is going wrong because
"can_railgate" is set to false during probe(). For rail-gating
to work no gpu re-work is needed and by default rail-gating
is enabled with INT_MAX delay.
Bug 200044987
Change-Id: I9367275cd18c34cb19a51193353585789ba44c03
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/556568
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Move nvgpu ioctls from the many user space interface headers to a new
single nvgpu.h header under include/uapi. No new code or replaced names
are introduced; this change only moves the definitions and changes
include directives accordingly.
Bug 1434573
Change-Id: I4d02415148e437a4e3edad221e08785fac377e91
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542651
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
To help remove the nvhost dependency from nvgpu, rename ioctl defines
and structures used by nvgpu such that nvhost is replaced by nvgpu.
Duplicate some structures as needed.
Update header guards and such accordingly.
Change-Id: Ifc3a867713072bae70256502735583ab38381877
Signed-off-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-on: http://git-master/r/542620
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Boards require a rework to make railgating and DVFS work realiably.
The information whether the board has been reworked or not will be
available on DTS.
This patch adds a DTS check to the GPU driver initialisation. If the
rework information is not available (or the rework has been marked as
disabled), railgating and DVFS are disabled.
Bug 1555485
Change-Id: Ie86fe35fb94377403472faffcbcaec645b6e40d9
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/500218
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Provide sysedp_dynamic_capping with the instantaneous GPU frequency
when notifying it of the GPU load. Modify the gpu/cpu priority
decision logic to choose CPU priority until GPU frequency gets "near"
the CPU-priority-limited-GPU-fmax. Introduce the priority_bias debugfs
parameter to facilitate tuning of "near". priority_bias takes a value
from 0 to 100.
Change-Id: Ia2cba36b8ea024fb8b01b5ba195dcf6550e38121
Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com>
Reviewed-on: http://git-master/r/481720
GVS: Gerrit_Virtual_Submit
Reviewed-on: http://git-master/r/498912
Reviewed-by: Timo Alho <talho@nvidia.com>
Enable gpu rail gating with INT_MAX delay. This will allow
teams to experiment with different rail-gate entry delay.
Change-Id: I8c696140aba2374c797365282999b6589432047c
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/491615
GVS: Gerrit_Virtual_Submit
Reviewed-by: Mitch Luban <mluban@nvidia.com>
Simulation does not model rails, so do not try to control them.
Change-Id: I52ec12e7865e18764274dd9ce7a2fbd196b6b9d1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/482181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Tested-by: Thomas Cherry <tcherry@nvidia.com>
Modify the 3d.emc policy to use a formula based on bandwidth and
utilization instead of the current sku-dependent policy.
Bug 1364894
Change-Id: Id97f765a48f0aa9f5ebeb0c82bccb22db474a1ae
Signed-off-by: Samuel Russell <samuelr@nvidia.com>
Reviewed-on: http://git-master/r/453586
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Currently gk20a gets reference of host1x via phandle in
Device Tree. But runtime PM does not seem to be handling power
dependencies too well in this case and hence some times host1x
is off when we need it.
To fix this, exlicitly power on host1x while powering gpu up.
Do this via "busy" and "idle" callbacks from gk20a_platform
Bug 1534272
Bug 200022536
Change-Id: Ia562ee19722cfc8edc5626a5a058ab8edfe3d206
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Do not abort GPU probe if secure page alloc fails.
We can just note that this allocation failed (using bool
secure_alloc_ready) and prevent further secure memory
allocation if this flag is not set.
Bug 1525465
Change-Id: Ie4eb6393951690174013d2de3db507876d7b657f
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/427730
GVS: Gerrit_Virtual_Submit
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Make gpu power management feature configurations
as platform data. Keep existing sttaus for gk20a
and disable all power features for gm20b.
Bug 1523728
Change-Id: Ife7786863f18e21b882ac77085c7abc7c84d4cfc
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/426369
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Supriya Sharatkumar <ssharatkumar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add gk20a as a sub power domain of host1x. This enforces keeping
host1x on when using gk20a.
Bug 200003112
Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/407006
(cherry picked from commit 009812b3e510518740e9c7e89b8b8b80439fe26a)
Reviewed-on: http://git-master/r/408013
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Currently the gpu driver assumes that the GPU is a child of host1x.
This is an invalid assumption and therefore we need to get the host1x
device from device tree based on nvidia,host1x property.
Bug 1311528
Bug 1434573
Change-Id: I097e39369aaa15ab6652cd23f353f88f7c2b9c48
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/395664
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Add gk20a as a sub power domain of host1x. This enforces keeping
host1x on when using gk20a.
Bug 200003112
Change-Id: I08db595bc7b819d86d33fb98af0d8fb4de369463
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/407543
Reviewed-by: Riham Haidar <rhaidar@nvidia.com>
Tested-by: Riham Haidar <rhaidar@nvidia.com>
After flash, kernel needs to reboot after first boot.
During reboot, devices is going to be shutdown including i2c.
But sometimes gpu driver trys to open gpu sysfs nodes and
unpowergate gpu at the same time. But i2c is already shutdown.
tegra_unpowergate_partition returns error in this case but
gk20a_tegra_unrailgate did not report the error so the error
is not handled. Return proper value in gk20a_tegra_unrailgate
to avoid this.
Bug 1488409
Change-Id: I3470ad44a0047ae9b06f5907162ccf51795a5e04
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/390688
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
