As a part of regoranizing clk_arb code, This patch does the folowing
1. Move clk_arb HAL files under common/clk_arb unit.
2. Move clk_arb from common/pmu to common/clk_arb.
3. Append public functions with nvgpu.
4. Make local functions as static.
Jira NVGPU-1966
Change-Id: If45c3dbfc4bbe74fe8d30e33e64894d553f3cda5
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027335
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Add new variable in nvgpu_as_map_buffer_ex_args for app
to specify the platform atomic support for the page.
When platform atomic attribute flag is set, pte memory
aperture is set to be coherent type.
renamed nvgpu_aperture_mask_coh -> nvgpu_aperture_mask_raw
function.
bug 200473147
Change-Id: I18266724dafdc8dfd96a0711f23cf08e23682afc
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2012679
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Currently a fifo_runlist_info_gk20a structure is allocated and
initialized for each possible runlist. But only a few runlists
are actually used.
Use an array of pointers to runlists in fifo_gk20a. The array
keeps existing indexing by runlist_id. In this patch a context
is still allocated for each possible runlist, but follow up
patch will allow to skip context allocation for inactive
runlists.
Bug 2470115
Change-Id: I1615043cea84db35a270ade64695d51f85c1193a
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2025203
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Move below APIs from gk20a/fecs_trace_gk20a.c
gk20a_fecs_trace_enable()
gk20a_fecs_trace_disable()
gk20a_fecs_trace_is_enabled()
gk20a_fecs_trace_reset_buffer()
gk20a_fecs_trace_buffer_size()
gk20a_gr_max_entries()
and move them to new gr/fecs_trace unit with below renames
nvgpu_gr_fecs_trace_enable()
nvgpu_gr_fecs_trace_disable()
nvgpu_gr_fecs_trace_is_enabled()
nvgpu_gr_fecs_trace_reset_buffer()
nvgpu_gr_fecs_trace_buffer_size()
nvgpu_gr_fecs_trace_max_entries()
Use new functions in the driver instead of old ones
Export gk20a_fecs_trace_periodic_polling() in fecs_trace_gk20a.h
header since it is needed in gr/fecs_trace for transition
This include and the function itself will be later moved to
gr/fecs_trace unit
Move struct nvgpu_gpu_ctxsw_trace_filter and all filter TSG
macros in the form NVGPU_GPU_CTXSW_TAG_* to gr/fecs_trace.h
Jira NVGPU-1880
Change-Id: Ic95b99554e626033a111452f311bbc026ec604e2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027530
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Move bus related HAL code to new top level HAL directory: hal/.
This directory should mirror the common directory as much as
possible.
There's some nice pros here:
1. Isolate HAL and common code.
2. Since the common directory should not be including HAL
related headers directly this structure will make it
easier to catch these sorts of bugs with a script.
Change-Id: Ib9eb03a97d05db17b637b115c650adcbe9553d54
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011627
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Move struct gk20a_fecs_trace_record to gr/fecs_trace unit and rename
it as struct nvgpu_fecs_trace_record
Move all of the APIs in nvgpu/fecs_trace.h to nvgpu/gr/fecs_trace.h
and rename them in nvgpu_gr_fecs_trace_*() format
Delete nvgpu/fecs_trace.h
Add new HAL unit common/gr/fecs_trace/fecs_trace_gm20b.c for register
accesses needed for gr/fecs_trace unit
Add below new HALs in this HAL unit
g->ops.fecs_trace.get_read_index()
g->ops.fecs_trace.get_write_index()
g->ops.fecs_trace.set_read_index()
Jira NVGPU-1880
Change-Id: Ib6ee32ba0d2f8a8a3e82491057e2f01a0275fcf4
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2024973
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Move struct gk20a_fecs_trace to new gr/fecs_trace unit and rename
it as struct nvgpu_gr_fecs_trace
Add enable_lock mutex and enable_count to this structure to support
QNX use cases
Remove init field from struct gk20a_fecs_trace
Rename gk20a_fecs_trace_init() to nvgpu_gr_fecs_trace_init() and
move it to new unit
Rename gk20a_fecs_trace_deinit() to nvgpu_gr_fecs_trace_deinit()
and move it to new unit
Update gk20a_fecs_trace_enable() to start thread only when
enable_count == 1, otherwise we just increment enable_count
Update gk20a_fecs_trace_disable() to stop thread when
enable_count == 0, otherwise we just decrement enable_count
Before this patch struct gk20a_fecs_trace was not visible in new
unit, and hence all mutex_acquire for list_lock were done in
fecs_trace_gk20a.c file
Since new struct is now available in new unit, move mutex_lock/release
calls to gr/fecs_trace unit now
Jira NVGPU-1880
Change-Id: I5abfa0165fa1c31716f3d6f2f669284f8959d7cf
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2024562
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Moved zbc related files to common/gr/zbc location.
struct nvgpu_gr_zbc created for zbc variables.
common zbc functions are moved to gr_zbc.c file.
All zbc hal functions are moved with corresponding chip specific
filename.
JIRA NVGPU-1882
Change-Id: I1bdaa2d9416e6e77ab305f117647dc070438ee86
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2019760
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Add zbc stencil as chip feature. This help to remove the
hals added for stencil feature, instead use common functions.
Removed hals
stencil_query_table
load_stencil_default_tbl
add_type_stencil
load_stencil_tbl
JIRA NVGPU-1882
Change-Id: Iae410a8dd879660ecfd2d2a5ebf28b2cc8309be4
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2022385
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Create a new directory fifo under common vgpu path moving all
vgp common fifo files under that directory.
Move vgpu runlist implementations to a new file runlist_vgpu.c
and create corresponding header file.
Also fix lines over 80 chars in fifo_vgpu.c
Jira GVSCI-334
Change-Id: Ic00535b22a6066a0d27435b9a987de7fa701ea05
Signed-off-by: Aparna Das <aparnad@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2011762
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As part of creating zbc as gr subunit, move pmu_save hal function
from zbc to pmu hal.
This hal function is used to pass the information to gpmu
firmware, which should reside as part of pmu.
remove pmu_save hal from zbc.
add save_zbc hal under pmu.
remove unused function gr_gk20a_pmu_save_zbc
JIRA NVGPU-1882
Change-Id: I132dbc7a9ee9755043cd08f288344df447e28af6
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2018581
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