Commit Graph

17 Commits

Author SHA1 Message Date
mpoojary
e9c6bcaf5c gpu: nvgpu: acr: Add support for t234 safety with dgpu ACR stack
This change is to adapt to shift of ACR t234 safety code from
iGPU to dGPU.
Required changes consists of:
Adding support for new LSB, WPR and ACR descriptor structures
which are more aligned with what dGPU currently uses.

Change old riscv LSB header to version 1, as version 2 will
be used for new header to align with dGPU header nomenclature.

Jira NVGPU-9298

Change-Id: Id75f7d0a03dc65c1983822ead428b330a83481a1
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2811116
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-12-18 11:41:25 -08:00
Dinesh Kamalakannan
19f44e0421 gpu: nvgpu: ls ucode decryption support
On T234 theCTXSW LS ucodes are encrypted. ACR will perform the
decryption and the decrypted content will be written back
into the same WPR location. So on recovery with LSPMU absence
and on warm boot case, to perform the authentication , the ucode
blob needs to be copied into the WPR from sysmem always.
Below are the LS ucodes authentication type
	* LSPMU - Only Signed ( Only for non-safety build, for safety LSPMU is NA)
	* CTXSW FECS/GPCCS - Encrypted and Signed (on both safety and non-safety build)

ACR FW P4 Change : 32110924

JIRA NVGPU-7903

Change-Id: If447148c02b9cf310102cfb9c688eef402699409
Signed-off-by: Dinesh Kamalakannan <dineshka@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2822656
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
2022-12-13 06:24:55 -08:00
Antony Clince Alex
61ae0b7642 gpu: nvgpu: fix emulate mode enable
The emulate mode support is determined after chip detect and is flagged
by using NVGPU_SUPPORT_EMULATE_MODE flag. The present logic prevents
user from configuring the emulate mode sysfs knobs if this flag is not
set, however the emulate mode usecase requires the user to configure the
syfs knob prior to power-on, hence defer emulate mode check to a later
stage after chip detect.

Bug 3621460

Change-Id: If522527542fa8d7e95ccbcff43b74adbb9e976e6
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2703953
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Ankur Kishore <ankkishore@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: David Li <davli@nvidia.com>
2022-04-29 06:17:59 -07:00
mpoojary
7df16ee9c4 gpu: nvgpu: Add support for acr safety binaries
Add support to pick ACR safety binaries when in safety
for ga10b

Jira NVGPU-8108

Change-Id: I3aca5e9d4b6e90af87cc7d8520366304ab579ec3
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2680710
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-03-17 12:21:28 -07:00
mpoojary
c1a995403a gpu: nvgpu: Add ACR error reporting to SDL
-Add check for ECC parity errors in IMEM, DMEM, EMEM, DCLS, REG
for ACR running in GSP engine.
The EXTIRQ3 external interrupt is set from ACR pointing towards host.
-Add function to check error type when ACR or Bootrom  execution fails
and report accordingly to SDL with relevant error codes.

This is a part of HSI safety requirements.

Bug 3564039
Jira NVGPU-8108

Change-Id: I65407371f7a1d1ba50a10bdf443ef6b903eeaa36
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2678100
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2022-03-15 17:33:42 -07:00
mpoojary
3da5e1515f gpu: nvgpu: Add support to pass platform data to ACR
This patch passes an extra byte(23:16) value to 'mode' variable of ACR interface,
value depends on func 'nvgpu_platform_is_simulation'.
This will let ACR ucode to identify whether a platform is simulation(VDK)
or not(VSP & Silicon).

Change-Id: I78efe9cd748c023dd17e80f498c3b8b34edd18e5
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2673063
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
2022-02-22 05:53:46 -08:00
Richard Zhao
9ab1271269 gpu: nvgpu: common: fix compile error of new compile flags
It's preparing to add bellow CFLAGS:
    -Werror -Wall -Wextra \
    -Wmissing-braces -Wpointer-arith -Wundef \
    -Wconversion -Wsign-conversion \
    -Wformat-security \
    -Wmissing-declarations -Wredundant-decls -Wimplicit-fallthrough

Jira GVSCI-11640

Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Change-Id: Ia8f508c65071aa4775d71b8ee5dbf88a33b5cbd5
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2555056
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2022-01-13 12:36:14 -08:00
mkumbar
61c6aeec41 gpu: nvgpu: disable LSPMU for ga10b safety
Bug 3456240

Change-Id: I0bb9581d2df46e5cb2dea57794ee0c918394eb66
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2645646
(cherry picked from commit aab86a06485c94546e11809cdeeefe9906e9b680)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2629878
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Shashank Singh <shashsingh@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2022-01-06 17:19:46 -08:00
mpoojary
41b7299201 gpu: nvgpu: zero blob size support for rail-gating.
Add support to pass ucode blob size as '0' while
rail-gating.

Bug 200776471

Change-Id: Ib178bc2f8881a1e49c874be346b0e712d4aca923
Signed-off-by: mpoojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2613466
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-12-04 11:59:44 -08:00
Mahantesh Kumbar
82526439dc gpu:nvgpu: Support to bootstrap ctxsw in MIG mode
-Update PMU_RPC_STRUCT_ACR_BOOTSTRAP_FALCON to
 accpet the FECS/GPCCS instance bootstrap request.
-Update the ACR ucode interface to take MIG mode
 param to config FECS/GPCCS SCTL PLM for LSPMU access.

JIRA NVGPU-6562

Change-Id: I460ef4e965009b3a77aeb4350f2191235f52c6f7
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2587033
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-09-23 20:21:43 -07:00
Mayur Poojary
fe7368f8f4 gpu: nvgpu: ga10b: Support emulate mode
Add sysfs node to enable gpu emulate_mode and
pass the value to acr through acr descriptor struct.

Bug 3279344

Change-Id: I936b1dda84d7f4f3688237308223c019798bdce3
Signed-off-by: Mayur Poojary <mpoojary@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2591377
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2021-09-20 16:40:34 -07:00
deepak goyal
cc7b048641 gpu: nvgpu: non-zero blob size for rail-gating.
Ucode blob size 0 is passed currently for rail-gating.
Ucode blob size 0 is not supported by ACR yet.
ACR will copy UCODE blob again
to SYSMEM for GPU Rail-gating cycles.

Bug 3361416

Change-Id: I1fdb3993cda7e5d62507d83f9c0a8645dc5f7fc7
Signed-off-by: deepak goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2588207
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
2021-09-09 09:16:37 -07:00
mkumbar
de267c034c gpu: nvgpu: ga10b: Enable PKC support
-Enable PKC support in ACR and LS-PMU
-Update the PMU f/w version.
-Enable PMU support by default.

Change-Id: I42bbe1b64ddc6ead9641c97d1ed27a9f4020510a
Signed-off-by: mkumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2568609
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Deepak Goyal <dgoyal@nvidia.com>
Tested-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-08-08 14:23:36 -07:00
smadhavan
d9add2db52 gpu: nvgpu: pkc signature verification support
This change adds lsf_ucode_desc_wrapper to hold the pkc signature
header and corresponding lsf_lsb_header_v2. During blob preparation
based on the flag is_sig_pkc, the new header defines will be
packed into ls blob and passed to acr.
The flag NVGPU_PKC_LS_SIG_ENABLED is also added, which will be set
based on the acr core selection.

JIRA NVGPU-6365

Change-Id: I74e25d7c0f69d4007893e46006f97f2a607fd11f
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Signed-off-by: deepak goyal <dgoyal@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2506136
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2021-07-19 16:04:25 -07:00
Antony Clince Alex
68e11c8bd3 gpu: nvgpu: remove nvgpu_next_gpuid.h
Replace all usages of NVGPU_NEXT_GPUID and NVGPU_NEXT_DGPU_GPUID
with NVGPU_GPUID_GA10B and NVGPU_GPUID_GA100.

Remove nvgpu_next_gpuid.h and update yaml.

Jira NVGPU-4771

Change-Id: I3baf0de4eb5266b79aabd5c6ddf8442bf8f73419
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2547735
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2021-06-27 05:03:09 -07:00
Antony Clince Alex
d2919409e9 gpu: nvgpu: rename/collpase nvgpu_next functions and structs
Replace all nvgpu_next functions/structs either by 1) collapsing them
into nvgpu legacy functions/structs 2) renaming them as follows:
- nvgpu_next_*() => nvgpu_(ga10b/ga100)_*()
- nvgpu_next_*() => (ga10b/ga100)_*()
- nvgpu_next_*() => nvgpu_*() [only if this doesn't cause collision]
- nvgpu_next_*() = > nvgpu_*_extra()

Create hal.sim unit and move Ampere+ SIM code into it.

Jira NVGPU-4771

Change-Id: I215594a0d0df4bd663bd875a0d0db47bcb9ff6a2
Signed-off-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2548056
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2021-06-27 05:02:58 -07:00
Sagar Kadamati
3e43f92f21 gpu: nvgpu: add ga10b & ga100 sources
Mass copy ga10b & ga100 sources from nvgpu-next repo.
TOP COMMIT-ID: 98f530e6924c844a1bf46816933a7fe015f3cce1

Jira NVGPU-4771

Change-Id: Ibf7102e9208133f8ef3bd3a98381138d5396d831
Signed-off-by: Sagar Kadamati <skadamati@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2524817
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Reviewed-by: Debarshi Dutta <ddutta@nvidia.com>
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Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
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GVS: Gerrit_Virtual_Submit
2021-06-17 12:56:16 -07:00