Jinesh Parakh
48257490be
gpu: nvgpu: Update the number of clock domains supported
...
Fix the following Coverity Defects:
clk_mon_tu104.c : Out-of-bounds write
clk_mon_tu104.c : Out-of-bounds read
clk_mon_tu104.c : Out-of-bounds access
Fix the following CERT-C Defects:
clk_mon_tu104.c : CERT STR31-C
For fixing an older Coverity defect,
we had changed datatype of domain mask
from u32 to unsigned long.
This thing generates another issue.
bit_pos range changes from [0,32) to [0,64).
Changing CLK_CLOCK_MON_DOMAIN_COUNT from 0x32U to 0x40U
solves the issue.
CID 10138023
CID 10138024
CID 10138025
CID 518885
CID 518887
CID 518890
Bug 3460991
Bug 3512546
Signed-off-by: Jinesh Parakh <jparakh@nvidia.com >
Change-Id: I2a4853d87d7bb316db3de56ef34a039bf02486d7
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2728545
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2022-06-16 17:59:19 -07:00
Jinesh Parakh
bb73cf9597
gpu: nvgpu: Fixed out-of-bounds Coverity Defects
...
Fix following Coverity Defects:
clk_mon_tu104.c : Out-of-bounds read and Out-of-bounds access
CID 10061400
CID 10061401
Bug 3460991
Changed the datatype of domain_mask from u32 to unsigned long
to solve the out-of-bounds defect.
Signed-off-by: Jinesh Parakh <jparakh@nvidia.com >
Change-Id: I1c43bd90053264ee4104ca8c3a33d9ea07f04045
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2708765
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2022-05-25 11:44:59 -07:00
shashank singh
876feb8842
gpu: nvgpu: fix incorrect clk hal names
...
Jira NVGPU-5435
Change-Id: I5ab7a2f45d094a316c97ffd980e128e21947b97f
Signed-off-by: shashank singh <shashsingh@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2360777
Reviewed-by: automaticguardword <automaticguardword@nvidia.com >
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GVS: Gerrit_Virtual_Submit
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2020-12-15 14:13:28 -06:00
Abdul Salam
d339d9ed33
gpu: nvgpu: segregate clk_mon from clk unit.
...
As a part of refactoring this CL removes clk_mon unit from
clk unit.
Clk_mon is used for monitoring of clk and it is an independent unit.
This patch does the following.
*Move the clk_mon struct from clk.h to clk_mon_tu104.h
*create a new clk_mon gpu_ops and assign clk_mon specific ops there.
*Move all the function to clk_mon_tu104.c
*Update the yaml file
NVGPU-4689
Change-Id: Ia72bf28a93ce9a7936c277076f365c4b6593b032
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2336230
Reviewed-by: automaticguardword <automaticguardword@nvidia.com >
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Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com >
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com >
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2020-12-15 14:13:28 -06:00
Abdul Salam
4f5bd9e633
gpu: nvgpu: Implement clk_good and pll_lock check
...
Add clk_good and pll_lock check as a part of fmon polling.
This will poll for any clock related faults at FTTI interval.
Add new function to poll for vbios init completion.
NVGPU-4967
Bug 2849506
Bug 200564937
Change-Id: I5bc885329981e07376824e148edabe9be4120e1c
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2305782
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2020-12-15 14:13:28 -06:00
Abdul Salam
53bd199e30
gpu: nvgpu: Seperate clk monitor from clk unit
...
Clock monitor is for monitoring clk status.
This is separated from clk unit which manages the clk.
NVGPU-4491
Change-Id: If83434db7970f1b024f545672a6f1e92ee66dbbc
Signed-off-by: Abdul Salam <absalam@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2313201
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com >
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Reviewed-by: Ramesh Mylavarapu <rmylavarapu@nvidia.com >
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com >
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GVS: Gerrit_Virtual_Submit
2020-12-15 14:13:28 -06:00
