Add macros for whitelisting coverity violations. These macros use pragma
directives. The pragma directives and whitelisting macros are only
enabled when a coverity scan is being run.
The whitelisting macros have been added to a new header called
static_analysis.h. The contents of safe_ops.h (CERT C safe ops) have
been moved into static_analysis.h because this will be the new header
for static analysis related macros/defines/etc.
JIRA NVGPU-3820
Change-Id: I9c63f20f670880b420415535738034619314b7c3
Signed-off-by: Adeel Raza <araza@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2180600
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Add support gr_prepare for sw and hw.
Add needed registers using nvgpu_posix_io_add_reg_space calls.
Add unit tests covering following functions
nvgpu_gr_prepare_sw
nvgpu_gr_enable_hw
install-unit.sh modified to copy the firmware binaries under
nvgpu-unit/firmware directory
Currently the gr_init_prepare test is called as part of the
gr_config test, later this will be moved as separate unit test.
Jira NVGPU-3582
Bug 2693908
Change-Id: If8f5ac4988deba0db477b2177981f7912bdb8eec
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2191254
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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Add posix support for nvgpu_request_firmware and
nvgpu_release_firmware calls.
In x86, needed firmware are copied under userspace/firmware
directory.For jetson, firmware files will be copied under
nvgpu_unit/firmware directory.
Update Makefile.tmk to copy firmware in systemimage under
nvgpu_unit/firmware directory.
Jira NVGPU-3582
Bug 2693908
Change-Id: I5f5e5819dc5501e587bc8afc0a3944c18a8e9bef
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189493
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
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The SWUT framework wasn't complete when the init unit test was
developed. The SWUT documentation for the init unit test was written
during the test development already. Now that the SWUT framework
exists, this adds the linkages to include the init SWUT documentation
in the actual SWUT.
JIRA NVGPU-2239
Change-Id: I47da36bb31c86c742d300e6ab7dca27ca34b9ca6
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2190019
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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The threaded tests for inc_and_test, dec_and_test, and sub_and_test were
not "passing" reliably for the "not_atomic" variants.
This updates these tests (atomic and non-atomic) to increase concurrency
of the operations by having each thread execute the operation 100 times
each rather than just once. For the sake of test time, it creates new
args for the threaded versions to keep iterations reasonable.
JIRA NVGPU-3954
Change-Id: I1fe2baa73ed1b9d4a8e13c97656411329b141db0
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189347
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
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This reverts commit 9bfdb2ba03f90f0cf828f08b99101a3a3e6c4532.
Bug 2693908
Change-Id: I3ef56773e46aad3626f16b84ea5e51c2fdcc3f1c
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189200
This reverts commit 2a7e6a1111c2e52df2eae22fd084f0c955ed0759.
Bug 2693908
Change-Id: Id9ed7a6b18929cf1b319a54aca227c7c36515f26
Signed-off-by: Bo Yan <byan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2189199
Add posix support for nvgpu_request_firmware and
nvgpu_release_firmware calls.
In x86, needed firmware are copied under userspace/firmware
directory. For jetson, firmware files will be copied under
nvgpu_unit/firmware directory.
Update Makefile.tmk to copy firmware under systemimage under
nvgpu_unit/firmware directory
Jira NVGPU-3582
Change-Id: I9ce729af797e59c8d41a1aa4ee964d7d9b8b666e
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2181572
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add support gr_prepare for sw and hw.
Add needed registers using nvgpu_posix_io_add_reg_space calls.
Add unit tests covering following functions
nvgpu_gr_prepare_sw
nvgpu_gr_enable_hw
Copy the falcon ucode binaries under userspace/firmware
directory
install-unit.sh modified to copy the firmware binaries
under nvgpu-unnit/firmware directory
Jira NVGPU-3582
Change-Id: If2131d2c48e828251208da86688b0594e62de82e
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2184293
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add support for the fuse and gv11b_gr related
registers and with initialized values need for
gr_config tests.
Add unit tests covering following functions
nvgpu_gr_alloc
nvgpu_gr_config_init
nvgpu_gr_config_deinit
nvgpu_gr_free
Most of the gr_config.h get and set functions
will be used in config_check_set_get test
Jira NVGPU-3582
Change-Id: I69637b3047d844559ac5b44ffd366551af8ea12c
Signed-off-by: vinodg <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2176369
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utf_falcons in libfalcon_utf.so are used by multiple unit tests and
since unit tests are run out of order it might lead to inconsistent
access to these structs.
Move these to falcon unit test. Updated the logic in the falcon utf
shared library to only export the interfaces to read/write to flcn
registers/memory.
JIRA NVGPU-2159
Change-Id: I3a1f80cce205747de4085802199ecc355bb95d6f
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2174187
GVS: Gerrit_Virtual_Submit
Reviewed-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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Long ago I made a config file for the userspace build but that file
has now been superseded by the Makefile.shared.configs file. So
delete this file as it's clutter that causes a lot of confusion.
Change-Id: I6bff1e6e7576e310b79988c51ecebec04a1e8781
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2174554
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Add nvgpu_utf_falcon_set_dmactl() function in falcon UTF
to set the falcon dmactl register with desired value
required for pmu reset test
Also, update the register size for falcon from 0x300 to 0x400
for including pmu reset register.
Rename userspace/units/facon/falcon folder to
userspace/units/facon/falcon_tests
JIRA NVGPU-2159
Change-Id: I0b22cff4699af6947e87019751aa85508dfdb185
Signed-off-by: Divya Singhatwaria <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2155124
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
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Following common and corresponding hal functions are non-safe. They are
either required for intr handling or for debug. Compile them out for
igpu safety release. Moved corresponding HALs to falcon_gk20a.c.
nvgpu_falcon_copy_from_emem
nvgpu_falcon_copy_to_emem
nvgpu_falcon_clear_halt_intr_status
nvgpu_falcon_set_irq
nvgpu_falcon_copy_from_dmem
nvgpu_falcon_copy_from_imem
nvgpu_falcon_print_dmem
nvgpu_falcon_print_imem
nvgpu_falcon_get_ctls
nvgpu_falcon_dump_stats can be used in the safety debug build.
JIRA NVGPU-898
JIRA NVGPU-2214
Change-Id: Icb7f904b088aa74b976f75a6a0ecdb783486bab3
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152978
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
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Remove the linking of unit test framework library with
libnvgpu_drv.so. The posix probe and close functions are
referenced using dl symbols.
Jira NVGPU-3837
Change-Id: I4af378c060d2606a8796ff28300c79bbe9e4b237
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2137794
GVS: Gerrit_Virtual_Submit
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Tested-by: Alex Waterman <alexw@nvidia.com>
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channel and tsg units used to build object files from
upper fifo directory. But this was causing build
dependencies issues and stale .o files could be used.
Fixed this by building a shared library for nvgpu-fifo
for tmake makefiles.
Jira NVGPU-3480
Change-Id: I52c9e32b110c560fd445b8c854801f270364953d
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2151815
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ajesh K V <akv@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
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MISRA Rule 8.6 requires that an identifier with external linkage
shall have exactly one external definition. Fix violation of
Rule 8.6 in kmem unit by moving the prototype of fault injection
related function under respective define.
Jira NVGPU-3293
Change-Id: Iac7099fb4a6e396b97edd1ef10b8dfca3c5df760
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2152166
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
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channel and tsg units used to build object files from
upper fifo directory. But this was causing build
dependencies issues and stale .o files could be used.
Fixed this by building a shared library for nvgpu-fifo
for host makefiles.
Jira NVGPU-3480
Change-Id: I32655c207f48baa5cde40846ae5a276c7c8fa6fd
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2150370
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com>
Tested-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
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