Tejal Kudav
0c9f589f3f
gpu: nvgpu: Remove TLC error regs from dev_reginit
...
The TLC error registers will be programmed as part of
interrupt and error initialization code. This will help move
all common.nvlink_turing_intr unit related code together.
JIRA NVGPU-4350
Change-Id: I1c291f346eee890ee973889473b44227306d0400
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2327621
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2020-12-15 14:13:28 -06:00
Sagar Kamble
3f08cf8a48
gpu: nvgpu: rename feature Make and C flags
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Name the Make and C flag variables consistently wih syntax:
CONFIG_NVGPU_<feature name>
s/NVGPU_DEBUGGER/CONFIG_NVGPU_DEBUGGER
s/NVGPU_CYCLESTATS/CONFIG_NVGPU_CYCLESTATS
s/NVGPU_USERD/CONFIG_NVGPU_USERD
s/NVGPU_CHANNEL_WDT/CONFIG_NVGPU_CHANNEL_WDT
s/NVGPU_FEATURE_CE/CONFIG_NVGPU_CE
s/NVGPU_GRAPHICS/CONFIG_NVGPU_GRAPHICS
s/NVGPU_ENGINE/CONFIG_NVGPU_FIFO_ENGINE_ACTIVITY
s/NVGPU_FEATURE_CHANNEL_TSG_SCHED/CONFIG_NVGPU_CHANNEL_TSG_SCHED
s/NVGPU_FEATURE_CHANNEL_TSG_CONTROL/CONFIG_NVGPU_CHANNEL_TSG_CONTROL
s/NVGPU_FEATURE_ENGINE_QUEUE/CONFIG_NVGPU_ENGINE_QUEUE
s/GK20A_CTXSW_TRACE/CONFIG_NVGPU_FECS_TRACE
s/IGPU_VIRT_SUPPORT/CONFIG_NVGPU_IGPU_VIRT
s/CONFIG_TEGRA_NVLINK/CONFIG_NVGPU_NVLINK
s/NVGPU_DGPU_SUPPORT/CONFIG_NVGPU_DGPU
s/NVGPU_VPR/CONFIG_NVGPU_VPR
s/NVGPU_REPLAYABLE_FAULT/CONFIG_NVGPU_REPLAYABLE_FAULT
s/NVGPU_FEATURE_LS_PMU/CONFIG_NVGPU_LS_PMU
s/NVGPU_FEATURE_POWER_PG/CONFIG_NVGPU_POWER_PG
JIRA NVGPU-3624
Change-Id: I8b2492b085095fc6ee95926d8f8c3929702a1773
Signed-off-by: Sagar Kamble <skamble@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2130290
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2019-06-11 09:46:24 -07:00
Tejal Kudav
87cea7e409
gpu: nvgpu: Fix MISRA 11.8 violations in nvlink
...
MISRA rule 11.8 prohibits any cast which removes "const" or "volatile"
qualification from the type pointed to by the pointer. Fix such 11.8
violations in nvlink code by adding "const" to type cast.
JIRA NVGPU-1921
Change-Id: Ib37617d7a0e08b22aaf1b865ba08fc0d803e3acc
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2024903
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2019-02-22 03:47:51 -08:00
Tejal Kudav
e7987729bd
gpu: nvgpu: Fix 10.3 MISRA violations in nvlink
...
MISRA Rule 10.3 does not allow value of expression to be assigned to
an object with a narrower essential type or to a different essential
type category.
Fix such 10.3 violations in nvlink code by type-casting (when sure
there will be no overflows) or by changing the data-type of variables
JIRA NVGPU-1921
Change-Id: Iab103a7f0c23cf2a047152cbd76c0b55b3cc947c
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2012811
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2019-02-19 21:24:55 -08:00
Tejal Kudav
cb0d314f23
gpu: nvgpu: Fix MISRA 16.x violations in nvlink
...
All the 16.x MISRA rules are relevant to switch statement
formatting and hence addressed in single patch
As per MISRA 16.1, all switch statements should be well formatted.
16.3 fixes:
Add unconditional break statements to all the switch-clauses
to adhere to MISRA rule 16.3.
JIRA NVGPU-1921
Change-Id: I7caee762bad03889944c94b44124e673b64e1fbc
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2014634
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2019-02-12 00:29:43 -08:00
Tejal Kudav
653eb349f2
gpu: nvgpu: Fix 21.2 MISRA issues in common/nvlink
...
Remove the '__' prefix from identifier names as they are violate
MISRA rule 21.2.
JIRA NVGPU-1921
Change-Id: I83de72c8f4f4227576ee9be8dd2c348168954f0f
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2009174
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2019-02-01 11:59:46 -08:00
Tejal Kudav
d36cf64088
gpu: nvgpu: Fix 15.6 MISRA issues in nvlink common
...
MISRA Rule-15.6 requires that if-else and loop blocks be enclosed in
braces. Fix 15.6 violations in nvlink common code by adding
braces.
JIRA NVGPU-1921
Change-Id: I77325f1138c4359fbfc1ff9199441d9c40d13128
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/2008408
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2019-02-01 11:59:33 -08:00
Tejal Kudav
a28c753ee6
gpu: nvgpu: Add nvlink "device_reginit" unit
...
Move the code involved in nvlink register initialization into a
separate unit called "nvlink_device_reginit".
Nvlink device_reginit will be an unit under component nvlink_init.
TLC buffer credit initialization is done by this unit.
JIRA NVGPU-1784
Change-Id: I9dd4238d0288b33867eb8a8993e56287a67a907f
Signed-off-by: Tejal Kudav <tkudav@nvidia.com >
Reviewed-on: https://git-master.nvidia.com/r/1994665
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2019-01-29 21:54:52 -08:00
